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| Main Authors: | , , , , |
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| Format: | Preprint |
| Published: |
2025
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| Subjects: | |
| Online Access: | https://arxiv.org/abs/2502.10932 |
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| _version_ | 1866911601975623680 |
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| author | Roman-Vicharra, Cristhian Sengupta, Prianka Wang, Runzhi Chen, Yiran Hu, Jiang |
| author_facet | Roman-Vicharra, Cristhian Sengupta, Prianka Wang, Runzhi Chen, Yiran Hu, Jiang |
| contents | In heterogeneous integration, different dies may employ distinct technologies, making floorplanning across multiple dies inherently coupled with technology assignment. By assuming a fixed technology, almost all prior floorplanning studies were developed without addressing the challenge of technology assignment. This work presents the first systematic study of multi-die floorplanning that treats technology choice as a variable. To address the challenge of variable block areas, we incorporate a recent machine learning technique for rapid PPA estimation. Our methods jointly optimize area, wirelength, performance, power, and cost, thereby highlighting the importance of technology assignment. Experimental evaluations, validated with a commercial tool for both 2.5D and 3D ICs, demonstrate that our systematic optimizations significantly outperform a greedy approach. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2502_10932 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Simultaneous Multi-die Floorplanning and Technology Assignment Roman-Vicharra, Cristhian Sengupta, Prianka Wang, Runzhi Chen, Yiran Hu, Jiang Systems and Control In heterogeneous integration, different dies may employ distinct technologies, making floorplanning across multiple dies inherently coupled with technology assignment. By assuming a fixed technology, almost all prior floorplanning studies were developed without addressing the challenge of technology assignment. This work presents the first systematic study of multi-die floorplanning that treats technology choice as a variable. To address the challenge of variable block areas, we incorporate a recent machine learning technique for rapid PPA estimation. Our methods jointly optimize area, wirelength, performance, power, and cost, thereby highlighting the importance of technology assignment. Experimental evaluations, validated with a commercial tool for both 2.5D and 3D ICs, demonstrate that our systematic optimizations significantly outperform a greedy approach. |
| title | Simultaneous Multi-die Floorplanning and Technology Assignment |
| topic | Systems and Control |
| url | https://arxiv.org/abs/2502.10932 |