Mapping and Execution of Nested Loops on Processor Arrays: CGRAs vs. TCPAs

Fuente: arXiv

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Bibliographic Details
Main Authors:	Walter, Dominik, Halm, Marita, Seidel, Daniel, Ghosh, Indrayudh, Heidorn, Christian, Hannig, Frank, Teich, Jürgen
Format:	Preprint
Published:	2025
Subjects:	Hardware Architecture
Online Access:	Acceder al recurso
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Internet

https://arxiv.org/abs/2502.12062