Buchumschlag

Variable Read Disturbance: An Experimental Analysis of Temporal Variation in DRAM Read Disturbance

Fuente: arXiv

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	Olgun, Ataberk, Bostanci, F. Nisa, Yuksel, Ismail Emir, Canpolat, Oguzhan, Luo, Haocong, Oliveira, Geraldo F., Yaglikci, A. Giray, Patel, Minesh, Mutlu, Onur
Format:	Preprint
Veröffentlicht:	2025
Schlagworte:	Hardware Architecture Cryptography and Security
Online-Zugang:	Acceder al recurso
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

Ähnliche Einträge

DiscoRD: An Experimental Methodology for Quickly Discovering the Reliable Read Disturbance Threshold of Real DRAM Chips
von: Olgun, Ataberk, et al.
Veröffentlicht: (2026)

ColumnDisturb: Understanding Column-based Read Disturbance in Real DRAM Chips and Implications for Future Systems
von: Yüksel, İsmail Emir, et al.
Veröffentlicht: (2025)

Chronus: Understanding and Securing the Cutting-Edge Industry Solutions to DRAM Read Disturbance
von: Canpolat, Oğuzhan, et al.
Veröffentlicht: (2025)

PuDHammer: Experimental Analysis of Read Disturbance Effects of Processing-using-DRAM in Real DRAM Chips
von: Yuksel, Ismail Emir, et al.
Veröffentlicht: (2025)

Revisiting DRAM Read Disturbance: Identifying Inconsistencies Between Experimental Characterization and Device-Level Studies
von: Luo, Haocong, et al.
Veröffentlicht: (2025)

Understanding the Security Benefits and Overheads of Emerging Industry Solutions to DRAM Read Disturbance
von: Canpolat, Oğuzhan, et al.
Veröffentlicht: (2024)

An Experimental Characterization of Combined RowHammer and RowPress Read Disturbance in Modern DRAM Chips
von: Luo, Haocong, et al.
Veröffentlicht: (2024)

Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions
von: Yağlıkçı, Abdullah Giray, et al.
Veröffentlicht: (2024)

In-DRAM True Random Number Generation Using Simultaneous Multiple-Row Activation: An Experimental Study of Real DRAM Chips
von: Yuksel, Ismail Emir, et al.
Veröffentlicht: (2025)

Understanding RowHammer Under Reduced Refresh Latency: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions
von: Tuğrul, Yahya Can, et al.
Veröffentlicht: (2025)

RowPress: Amplifying Read Disturbance in Modern DRAM Chips
von: Luo, Haocong, et al.
Veröffentlicht: (2023)

Understanding and Mitigating Covert Channel and Side Channel Vulnerabilities Introduced by RowHammer Defenses
von: Bostancı, F. Nisa, et al.
Veröffentlicht: (2025)

Rethinking the Producer-Consumer Relationship in Modern DRAM-Based Systems
von: Patel, Minesh, et al.
Veröffentlicht: (2024)

Self-Managing DRAM: A Low-Cost Framework for Enabling Autonomous and Efficient in-DRAM Operations
von: Hassan, Hasan, et al.
Veröffentlicht: (2022)

Read Disturbance in High Bandwidth Memory: A Detailed Experimental Study on HBM2 DRAM Chips
von: Olgun, Ataberk, et al.
Veröffentlicht: (2023)

Memory-Centric Computing: Recent Advances in Processing-in-DRAM
von: Mutlu, Onur, et al.
Veröffentlicht: (2024)

Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis
von: Yuksel, Ismail Emir, et al.
Veröffentlicht: (2024)

Cleaning up the Mess: Re-Evaluating the Real-System Modeling Accuracy of Ramulator 2.0
von: Bostanci, F. Nisa, et al.
Veröffentlicht: (2025)

ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation
von: Olgun, Ataberk, et al.
Veröffentlicht: (2023)

Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis
von: Yuksel, Ismail Emir, et al.
Veröffentlicht: (2024)

EasyDRAM: An FPGA-based Infrastructure for Fast and Accurate End-to-End Evaluation of Emerging DRAM Techniques
von: Canpolat, Oğuzhan, et al.
Veröffentlicht: (2025)

Sectored DRAM: A Practical Energy-Efficient and High-Performance Fine-Grained DRAM Architecture
von: Olgun, Ataberk, et al.
Veröffentlicht: (2022)

DRAM Bender: An Extensible and Versatile FPGA-based Infrastructure to Easily Test State-of-the-art DRAM Chips
von: Olgun, Ataberk, et al.
Veröffentlicht: (2022)

PULSAR: Simultaneous Many-Row Activation for Reliable and High-Performance Computing in Off-the-Shelf DRAM Chips
von: Yuksel, Ismail Emir, et al.
Veröffentlicht: (2023)

Enabling Efficient and Scalable DRAM Read Disturbance Mitigation via New Experimental Insights into Modern DRAM Chips
von: Yağlıkçı, Abdullah Giray
Veröffentlicht: (2024)

MIMDRAM: An End-to-End Processing-Using-DRAM System for High-Throughput, Energy-Efficient and Programmer-Transparent Multiple-Instruction Multiple-Data Processing
von: Oliveira, Geraldo F., et al.
Veröffentlicht: (2024)

BreakHammer: Enhancing RowHammer Mitigations by Carefully Throttling Suspect Threads
von: Canpolat, Oğuzhan, et al.
Veröffentlicht: (2024)

CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost
von: Bostanci, F. Nisa, et al.
Veröffentlicht: (2024)

Memory-Centric Computing: Solving Computing's Memory Problem
von: Mutlu, Onur, et al.
Veröffentlicht: (2025)

Revisiting Main Memory-Based Covert and Side Channel Attacks in the Context of Processing-in-Memory
von: Bostanci, F. Nisa, et al.
Veröffentlicht: (2024)

SpyHammer: Understanding and Exploiting RowHammer under Fine-Grained Temperature Variations
von: Orosa, Lois, et al.
Veröffentlicht: (2022)

RowPress Vulnerability in Modern DRAM Chips
von: Luo, Haocong, et al.
Veröffentlicht: (2024)

DaPPA: A Data-Parallel Programming Framework for Processing-in-Memory Architectures
von: Oliveira, Geraldo F., et al.
Veröffentlicht: (2023)

Proteus: Enabling High-Performance Processing-Using-DRAM with Dynamic Bit-Precision, Adaptive Data Representation, and Flexible Arithmetic
von: Oliveira, Geraldo F., et al.
Veröffentlicht: (2025)

Enhancing Reliability of STT-MRAM Caches by Eliminating Read Disturbance Accumulation
von: Cheshmikhani, Elham, et al.
Veröffentlicht: (2026)

PIM-Opt: Demystifying Distributed Optimization Algorithms on a Real-World Processing-In-Memory System
von: Rhyner, Steve, et al.
Veröffentlicht: (2024)

GateKeeper-GPU: Fast and Accurate Pre-Alignment Filtering in Short Read Mapping
von: Bingöl, Zülal, et al.
Veröffentlicht: (2021)

PUMA: Efficient and Low-Cost Memory Allocation and Alignment Support for Processing-Using-Memory Architectures
von: Oliveira, Geraldo F., et al.
Veröffentlicht: (2024)

ImPress: Securing DRAM Against Data-Disturbance Errors via Implicit Row-Press Mitigation
von: Qureshi, Moinuddin, et al.
Veröffentlicht: (2024)

Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Instruction Execution
von: Bera, Rahul, et al.
Veröffentlicht: (2024)