Leveraging Error Resilience of Iterative Algorithms for Energy Efficiency: from Concept to Implementation

Fuente: arXiv
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Autores principales: Gillani, G. A., Krapukhin, A., Kokkeler, A. B. J.
Formato: Preprint
Publicado: 2025
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author Gillani, G. A.
Krapukhin, A.
Kokkeler, A. B. J.
author_facet Gillani, G. A.
Krapukhin, A.
Kokkeler, A. B. J.
contents Iterative algorithms are widely used in digital signal processing applications. With the case study of radio astronomy calibration processing, this work contributes towards revealing and exploiting the intrinsic error resilience of iterative algorithms for energy efficiency benefits. We consider iterative methods that use a convergence criterion as a quality metric to terminate the iterative computations. We propose an adaptive statistical approximation model for high-level resilience analysis that provides an opportunity to divide an iterative algorithm into exact and approximate iterations. We realize an energy-efficient accelerator based on a heterogeneous architecture, where the heterogeneity is introduced using accurate and approximate processing cores. Our proposed methodology exploits the error-resilience of the algorithm, where initial iterations are processed on approximate modules while the later ones on accurate modules. The proposed accelerator design does not increase the number of iterations as compared to that of an accurate counterpart and provides sufficient precision to converge to an acceptable solution. Our implementation using TSMC 40nm Low Power (TCBN40LP) technology shows 23% savings in electrical energy consumption.
format Preprint
id arxiv_https___arxiv_org_abs_2502_14729
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Leveraging Error Resilience of Iterative Algorithms for Energy Efficiency: from Concept to Implementation
Gillani, G. A.
Krapukhin, A.
Kokkeler, A. B. J.
Signal Processing
Hardware Architecture
Iterative algorithms are widely used in digital signal processing applications. With the case study of radio astronomy calibration processing, this work contributes towards revealing and exploiting the intrinsic error resilience of iterative algorithms for energy efficiency benefits. We consider iterative methods that use a convergence criterion as a quality metric to terminate the iterative computations. We propose an adaptive statistical approximation model for high-level resilience analysis that provides an opportunity to divide an iterative algorithm into exact and approximate iterations. We realize an energy-efficient accelerator based on a heterogeneous architecture, where the heterogeneity is introduced using accurate and approximate processing cores. Our proposed methodology exploits the error-resilience of the algorithm, where initial iterations are processed on approximate modules while the later ones on accurate modules. The proposed accelerator design does not increase the number of iterations as compared to that of an accurate counterpart and provides sufficient precision to converge to an acceptable solution. Our implementation using TSMC 40nm Low Power (TCBN40LP) technology shows 23% savings in electrical energy consumption.
title Leveraging Error Resilience of Iterative Algorithms for Energy Efficiency: from Concept to Implementation
topic Signal Processing
Hardware Architecture
url https://arxiv.org/abs/2502.14729