GPUArmor: A Hardware-Software Co-design for Efficient and Scalable Memory Safety on GPUs
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arXiv
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| Autores principales: | , , , , |
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| Formato: | Preprint |
| Publicado: |
2025
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| _version_ | 1866909511680262144 |
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| author | Ziad, Mohamed Tarek Ibn Damani, Sana Stephenson, Mark Keckler, Stephen W. Jaleel, Aamer |
| author_facet | Ziad, Mohamed Tarek Ibn Damani, Sana Stephenson, Mark Keckler, Stephen W. Jaleel, Aamer |
| contents | Memory safety errors continue to pose a significant threat to current computing systems, and graphics processing units (GPUs) are no exception. A prominent class of memory safety algorithms is allocation-based solutions. The key idea is to maintain each allocation's metadata (base address and size) in a disjoint table and retrieve it at runtime to verify memory accesses. While several previous solutions have adopted allocation-based algorithms (e.g., cuCatch and GPUShield), they typically suffer from high memory overheads or scalability problems. In this work, we examine the key characteristics of real-world GPU workloads and observe several differences between GPU and CPU applications regarding memory access patterns, memory footprint, number of live allocations, and active allocation working set. Our observations motivate GPUArmor, a hardware-software co-design framework for memory safety on GPUs. We show that a simple compiler analysis combined with lightweight hardware support using a small Memory Lookaside Buffer (MLB) can help prevent spatial and temporal memory violations on modern GPU workloads with 2.3% average run time overheads. More importantly, GPUArmor achieves speed-of-light performance with negligible storage requirements. This result benefits both base and bounds solutions and memory tagging techniques, which we showcase with GPUArmor-HWOnly, a variation of GPUArmor that does not require recompilation, and achieves 2.2% slowdowns while significantly reducing storage overheads beyond traditional memory tagging approaches. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2502_17780 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | GPUArmor: A Hardware-Software Co-design for Efficient and Scalable Memory Safety on GPUs Ziad, Mohamed Tarek Ibn Damani, Sana Stephenson, Mark Keckler, Stephen W. Jaleel, Aamer Distributed, Parallel, and Cluster Computing Systems and Control Memory safety errors continue to pose a significant threat to current computing systems, and graphics processing units (GPUs) are no exception. A prominent class of memory safety algorithms is allocation-based solutions. The key idea is to maintain each allocation's metadata (base address and size) in a disjoint table and retrieve it at runtime to verify memory accesses. While several previous solutions have adopted allocation-based algorithms (e.g., cuCatch and GPUShield), they typically suffer from high memory overheads or scalability problems. In this work, we examine the key characteristics of real-world GPU workloads and observe several differences between GPU and CPU applications regarding memory access patterns, memory footprint, number of live allocations, and active allocation working set. Our observations motivate GPUArmor, a hardware-software co-design framework for memory safety on GPUs. We show that a simple compiler analysis combined with lightweight hardware support using a small Memory Lookaside Buffer (MLB) can help prevent spatial and temporal memory violations on modern GPU workloads with 2.3% average run time overheads. More importantly, GPUArmor achieves speed-of-light performance with negligible storage requirements. This result benefits both base and bounds solutions and memory tagging techniques, which we showcase with GPUArmor-HWOnly, a variation of GPUArmor that does not require recompilation, and achieves 2.2% slowdowns while significantly reducing storage overheads beyond traditional memory tagging approaches. |
| title | GPUArmor: A Hardware-Software Co-design for Efficient and Scalable Memory Safety on GPUs |
| topic | Distributed, Parallel, and Cluster Computing Systems and Control |
| url | https://arxiv.org/abs/2502.17780 |