Seeded Topology Optimization for Commercial Foundry Integrated Photonics
Fuente:
arXiv
Gespeichert in:
| Hauptverfasser: | , , , , |
|---|---|
| Format: | Preprint |
| Veröffentlicht: |
2025
|
| Schlagworte: | |
| Online-Zugang: | |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| _version_ | 1866912586747871232 |
|---|---|
| author | Hiesener, Jacob M. Kaylor, C. Alex Wong, Joshua J. Agarwal, Prankush Ralph, Stephen E. |
| author_facet | Hiesener, Jacob M. Kaylor, C. Alex Wong, Joshua J. Agarwal, Prankush Ralph, Stephen E. |
| contents | We present a seeded topology optimization methodology for integrated photonic devices fabricated on foundry platforms that yields improved performance compared to traditional topology optimization. We employ blurring filters and a design rule check correction algorithm to more readily meet fabrication constraints, resulting in devices with fewer artifacts and improved correlation between simulation and measurements. A statistical study is performed on a 2D modal multiplexer, revealing that 87% of devices optimized using this strategy conform to foundry constraints, compared to 13% of devices optimized using traditional TO. We apply seeded topology optimization to an ultra-compact TE modal multiplexer, a TE mode converter, a polarization rotator, and a high-contrast grating reflector. Using this optimization strategy, the measured insertion loss of the TE mode converter was reduced from < 1.50 dB to < 0.64 dB, and the measured TE1 insertion loss of the TE modal multiplexer was reduced from < 3.95 dB to < 1.38 dB over C-band. This approach enables a two-step inverse design process, merging of physics-informed design strategies with inverse design, and ensures strict compliance with foundry constraints throughout optimization. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2503_00199 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Seeded Topology Optimization for Commercial Foundry Integrated Photonics Hiesener, Jacob M. Kaylor, C. Alex Wong, Joshua J. Agarwal, Prankush Ralph, Stephen E. Optics Computational Physics We present a seeded topology optimization methodology for integrated photonic devices fabricated on foundry platforms that yields improved performance compared to traditional topology optimization. We employ blurring filters and a design rule check correction algorithm to more readily meet fabrication constraints, resulting in devices with fewer artifacts and improved correlation between simulation and measurements. A statistical study is performed on a 2D modal multiplexer, revealing that 87% of devices optimized using this strategy conform to foundry constraints, compared to 13% of devices optimized using traditional TO. We apply seeded topology optimization to an ultra-compact TE modal multiplexer, a TE mode converter, a polarization rotator, and a high-contrast grating reflector. Using this optimization strategy, the measured insertion loss of the TE mode converter was reduced from < 1.50 dB to < 0.64 dB, and the measured TE1 insertion loss of the TE modal multiplexer was reduced from < 3.95 dB to < 1.38 dB over C-band. This approach enables a two-step inverse design process, merging of physics-informed design strategies with inverse design, and ensures strict compliance with foundry constraints throughout optimization. |
| title | Seeded Topology Optimization for Commercial Foundry Integrated Photonics |
| topic | Optics Computational Physics |
| url | https://arxiv.org/abs/2503.00199 |