Fast Jet Tagging with MLP-Mixers on FPGAs
Fuente:
arXiv
Gespeichert in:
| Hauptverfasser: | , , , |
|---|---|
| Format: | Preprint |
| Veröffentlicht: |
2025
|
| Schlagworte: | |
| Online-Zugang: | |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| _version_ | 1866914222433107968 |
|---|---|
| author | Sun, Chang Ngadiuba, Jennifer Pierini, Maurizio Spiropulu, Maria |
| author_facet | Sun, Chang Ngadiuba, Jennifer Pierini, Maurizio Spiropulu, Maria |
| contents | We explore the innovative use of MLP-Mixer models for real-time jet tagging and establish their feasibility on resource-constrained hardware like FPGAs. MLP-Mixers excel in processing sequences of jet constituents, achieving state-of-the-art performance on datasets mimicking Large Hadron Collider conditions. By using advanced optimization techniques such as High-Granularity Quantization and Distributed Arithmetic, we achieve unprecedented efficiency. These models match or surpass the accuracy of previous architectures, reduce hardware resource usage by up to 97%, double the throughput, and half the latency. Additionally, non-permutation-invariant architectures enable smart feature prioritization and efficient FPGA deployment, setting a new benchmark for machine learning in real-time data processing at particle colliders. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2503_03103 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Fast Jet Tagging with MLP-Mixers on FPGAs Sun, Chang Ngadiuba, Jennifer Pierini, Maurizio Spiropulu, Maria Instrumentation and Detectors Machine Learning We explore the innovative use of MLP-Mixer models for real-time jet tagging and establish their feasibility on resource-constrained hardware like FPGAs. MLP-Mixers excel in processing sequences of jet constituents, achieving state-of-the-art performance on datasets mimicking Large Hadron Collider conditions. By using advanced optimization techniques such as High-Granularity Quantization and Distributed Arithmetic, we achieve unprecedented efficiency. These models match or surpass the accuracy of previous architectures, reduce hardware resource usage by up to 97%, double the throughput, and half the latency. Additionally, non-permutation-invariant architectures enable smart feature prioritization and efficient FPGA deployment, setting a new benchmark for machine learning in real-time data processing at particle colliders. |
| title | Fast Jet Tagging with MLP-Mixers on FPGAs |
| topic | Instrumentation and Detectors Machine Learning |
| url | https://arxiv.org/abs/2503.03103 |