Saved in:
| Main Authors: | , , , , |
|---|---|
| Format: | Preprint |
| Published: |
2025
|
| Subjects: | |
| Online Access: | https://arxiv.org/abs/2503.09428 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1866913732908548096 |
|---|---|
| author | Brooke, James Clement, Emyr Glowacki, Maciej Paramesvaran, Sudarshan Segal, Jeronimo |
| author_facet | Brooke, James Clement, Emyr Glowacki, Maciej Paramesvaran, Sudarshan Segal, Jeronimo |
| contents | The implementation of convolutional neural networks in programmable logic, for applications in fast online event selection at hadron colliders is studied. In particular, an approach based on full event images for classification is studied, including hardware-aware optimisation of the network architecture, and evaluation of physics performance using simulated data. A range of network models are identified that can be implemented within resources of current FPGAs, as well as the stringent latency requirements of HL-LHC trigger systems. A candidate model that can be implemented in the CMS L1 trigger for HL-LHC was shown to be capable of excellent signal/background discrimination, although the performance depends strongly on the degree of pile-up mitigation possible prior to image generation. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2503_09428 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | LHC Triggers using FPGA Image Recognition Brooke, James Clement, Emyr Glowacki, Maciej Paramesvaran, Sudarshan Segal, Jeronimo Instrumentation and Detectors Computational Physics The implementation of convolutional neural networks in programmable logic, for applications in fast online event selection at hadron colliders is studied. In particular, an approach based on full event images for classification is studied, including hardware-aware optimisation of the network architecture, and evaluation of physics performance using simulated data. A range of network models are identified that can be implemented within resources of current FPGAs, as well as the stringent latency requirements of HL-LHC trigger systems. A candidate model that can be implemented in the CMS L1 trigger for HL-LHC was shown to be capable of excellent signal/background discrimination, although the performance depends strongly on the degree of pile-up mitigation possible prior to image generation. |
| title | LHC Triggers using FPGA Image Recognition |
| topic | Instrumentation and Detectors Computational Physics |
| url | https://arxiv.org/abs/2503.09428 |