Thermal Capacity Mapping of Cryogenic Platforms for Quantum Computers

Fuente: arXiv
Guardado en:
Detalles Bibliográficos
Autores principales: Manifold, Scott A., Long, George B., Burnett, Jonathan J.
Formato: Preprint
Publicado: 2025
Materias:
Acceso en línea:
Etiquetas: Agregar Etiqueta
Sin Etiquetas, Sea el primero en etiquetar este registro!
_version_ 1866913735907475456
author Manifold, Scott A.
Long, George B.
Burnett, Jonathan J.
author_facet Manifold, Scott A.
Long, George B.
Burnett, Jonathan J.
contents Large-scale cryogenic Input-Output (IO) infrastructure is a requirement for realising fault-tolerant quantum computing in solid-state modalities. Such IO scaling presents significant challenges in thermal modelling, hardware design and verification. Here we present a design tool for cryogenic platform development with applicability to quantum computing and other cryogenic technologies. By taking comprehensive measurements of a commercially available dilution refrigerator we construct a 'platform capacity map', quantifying the platform's complex response to heat loads distributed over multiple temperature stages and accounting for interstage dependencies, avoiding an analytical model. This allows for the modification of the platform parameters to be accurately estimated for the inclusion of an arbitrary IO infrastructure, the identification of stage thermal overheads and the optimisation of system parameters. We identify a key bottleneck around the Still stage, owing to loading from connected stages, and observe discrepancies between existing thermal modelling methods for estimating heat loads associated with IO and experimental results obtained from the platform capacity map.
format Preprint
id arxiv_https___arxiv_org_abs_2503_10775
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Thermal Capacity Mapping of Cryogenic Platforms for Quantum Computers
Manifold, Scott A.
Long, George B.
Burnett, Jonathan J.
Quantum Physics
Applied Physics
Large-scale cryogenic Input-Output (IO) infrastructure is a requirement for realising fault-tolerant quantum computing in solid-state modalities. Such IO scaling presents significant challenges in thermal modelling, hardware design and verification. Here we present a design tool for cryogenic platform development with applicability to quantum computing and other cryogenic technologies. By taking comprehensive measurements of a commercially available dilution refrigerator we construct a 'platform capacity map', quantifying the platform's complex response to heat loads distributed over multiple temperature stages and accounting for interstage dependencies, avoiding an analytical model. This allows for the modification of the platform parameters to be accurately estimated for the inclusion of an arbitrary IO infrastructure, the identification of stage thermal overheads and the optimisation of system parameters. We identify a key bottleneck around the Still stage, owing to loading from connected stages, and observe discrepancies between existing thermal modelling methods for estimating heat loads associated with IO and experimental results obtained from the platform capacity map.
title Thermal Capacity Mapping of Cryogenic Platforms for Quantum Computers
topic Quantum Physics
Applied Physics
url https://arxiv.org/abs/2503.10775