Saved in:
| Main Authors: | , , , , |
|---|---|
| Format: | Preprint |
| Published: |
2025
|
| Subjects: | |
| Online Access: | https://arxiv.org/abs/2503.11662 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1866913803868831744 |
|---|---|
| author | Wang, Runzhi Sengupta, Prianka Roman-Vicharra, Cristhian Chen, Yiran Hu, Jiang |
| author_facet | Wang, Runzhi Sengupta, Prianka Roman-Vicharra, Cristhian Chen, Yiran Hu, Jiang |
| contents | In chip design planning, obtaining reliable performance and power forecasts for various design options is of critical importance. Traditionally, this involves using system-level models, which often lack accuracy, or trial synthesis, which is both labor-intensive and time-consuming. We introduce a new methodology, called Lorecast, which accepts English prompts as input to rapidly generate layout-aware performance and power estimates. This approach bypasses the need for HDL code development and synthesis, making it both fast and user-friendly. Experimental results demonstrate that Lorecast achieves accuracy within a few percent of error compared to post-layout analysis, while significantly reducing turnaround time. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2503_11662 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Lorecast: Layout-Aware Performance and Power Forecasting from Natural Language Wang, Runzhi Sengupta, Prianka Roman-Vicharra, Cristhian Chen, Yiran Hu, Jiang Hardware Architecture Artificial Intelligence Computation and Language Machine Learning In chip design planning, obtaining reliable performance and power forecasts for various design options is of critical importance. Traditionally, this involves using system-level models, which often lack accuracy, or trial synthesis, which is both labor-intensive and time-consuming. We introduce a new methodology, called Lorecast, which accepts English prompts as input to rapidly generate layout-aware performance and power estimates. This approach bypasses the need for HDL code development and synthesis, making it both fast and user-friendly. Experimental results demonstrate that Lorecast achieves accuracy within a few percent of error compared to post-layout analysis, while significantly reducing turnaround time. |
| title | Lorecast: Layout-Aware Performance and Power Forecasting from Natural Language |
| topic | Hardware Architecture Artificial Intelligence Computation and Language Machine Learning |
| url | https://arxiv.org/abs/2503.11662 |