Hardware Efficient Accelerator for Spiking Transformer With Reconfigurable Parallel Time Step Computing

Documenti analoghi

• Low Power Vision Transformer Accelerator with Hardware-Aware Pruning and Optimized Dataflow
  di: Hsiung, Ching-Lin, et al.
  Pubblicazione: (2025)
• VESTA: A Versatile SNN-Based Transformer Accelerator with Unified PEs for Multiple Computational Layers
  di: Chen, Ching-Yao, et al.
  Pubblicazione: (2025)
• An Efficient Data Reuse with Tile-Based Adaptive Stationary for Transformer Accelerators
  di: Li, Tseng-Jen, et al.
  Pubblicazione: (2025)
• An Efficient Sparse Hardware Accelerator for Spike-Driven Transformer
  di: Li, Zhengke, et al.
  Pubblicazione: (2025)
• A Low-Power Sparse Deep Learning Accelerator with Optimized Data Reuse
  di: Hsu, Kai-Chieh, et al.
  Pubblicazione: (2025)