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Dual-Issue Execution of Mixed Integer and Floating-Point Workloads on Energy-Efficient In-Order RISC-V Cores

Fuente: arXiv

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Bibliographic Details
Main Authors:	Colagrande, Luca, Benini, Luca
Format:	Preprint
Published:	2025
Subjects:	Hardware Architecture
Online Access:	Acceder al recurso
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