Performance Characterizations and Usage Guidelines of Samsung CXL Memory Module Hybrid Prototype
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2025
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| author | Zeng, Jianping Pei, Shuyi Zhang, Da Zhou, Yuchen Beygi, Amir Yao, Xuebin Kachare, Ramdas Zhang, Tong Li, Zongwang Nguyen, Marie Pitchumani, Rekha Ki, Yang Soek Jung, Changhee |
| author_facet | Zeng, Jianping Pei, Shuyi Zhang, Da Zhou, Yuchen Beygi, Amir Yao, Xuebin Kachare, Ramdas Zhang, Tong Li, Zongwang Nguyen, Marie Pitchumani, Rekha Ki, Yang Soek Jung, Changhee |
| contents | The growing prevalence of data-intensive workloads, such as artificial intelligence (AI), machine learning (ML), high-performance computing (HPC), in-memory databases, and real-time analytics, has exposed limitations in conventional memory technologies like DRAM. While DRAM offers low latency and high throughput, it is constrained by high costs, scalability challenges, and volatility, making it less viable for capacity-bound and persistent applications in modern datacenters.
Recently, Compute Express Link (CXL) has emerged as a promising alternative, enabling high-speed, cacheline-granular communication between CPUs and external devices. By leveraging CXL technology, NAND flash can now be used as memory expansion, offering three-fold benefits: byte-addressability, scalable capacity, and persistence at a low cost. Samsung's CXL Memory Module Hybrid (CMM-H) is the first product to deliver these benefits through a hardware-only solution, i.e., it does not incur any OS and IO overheads like conventional block devices. In particular, CMM-H integrates a DRAM cache with NAND flash in a single device to deliver near-DRAM latency. This paper presents the first publicly available study for comprehensive characterizations of an FPGA-based CMM-H prototype. Through this study, we address users' concerns about whether a wide variety of applications can successfully run on a memory device backed by NAND flash medium. Additionally, based on these characterizations, we provide key insights into how to best take advantage of the CMM-H device. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2503_22017 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Performance Characterizations and Usage Guidelines of Samsung CXL Memory Module Hybrid Prototype Zeng, Jianping Pei, Shuyi Zhang, Da Zhou, Yuchen Beygi, Amir Yao, Xuebin Kachare, Ramdas Zhang, Tong Li, Zongwang Nguyen, Marie Pitchumani, Rekha Ki, Yang Soek Jung, Changhee Hardware Architecture The growing prevalence of data-intensive workloads, such as artificial intelligence (AI), machine learning (ML), high-performance computing (HPC), in-memory databases, and real-time analytics, has exposed limitations in conventional memory technologies like DRAM. While DRAM offers low latency and high throughput, it is constrained by high costs, scalability challenges, and volatility, making it less viable for capacity-bound and persistent applications in modern datacenters. Recently, Compute Express Link (CXL) has emerged as a promising alternative, enabling high-speed, cacheline-granular communication between CPUs and external devices. By leveraging CXL technology, NAND flash can now be used as memory expansion, offering three-fold benefits: byte-addressability, scalable capacity, and persistence at a low cost. Samsung's CXL Memory Module Hybrid (CMM-H) is the first product to deliver these benefits through a hardware-only solution, i.e., it does not incur any OS and IO overheads like conventional block devices. In particular, CMM-H integrates a DRAM cache with NAND flash in a single device to deliver near-DRAM latency. This paper presents the first publicly available study for comprehensive characterizations of an FPGA-based CMM-H prototype. Through this study, we address users' concerns about whether a wide variety of applications can successfully run on a memory device backed by NAND flash medium. Additionally, based on these characterizations, we provide key insights into how to best take advantage of the CMM-H device. |
| title | Performance Characterizations and Usage Guidelines of Samsung CXL Memory Module Hybrid Prototype |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2503.22017 |