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CIMR-V: An End-to-End SRAM-based CIM Accelerator with RISC-V for AI Edge Device

Fuente: arXiv

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Bibliographic Details
Main Authors:	and, Yan-Cheng Guo, Chang, Tian-Sheuan, Lin, Chih-Sheng, Chiou, Bo-Cheng, Lai, Chih-Ming, Sheu, Shyh-Shyuan, Lo, Wei-Chung, Chang, Shih-Chieh
Format:	Preprint
Published:	2025
Subjects:	Hardware Architecture
Online Access:	Acceder al recurso
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