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| Natura: | Preprint |
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2025
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| Accesso online: | https://arxiv.org/abs/2504.04884 |
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| _version_ | 1866909568987037696 |
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| author | Kiamarzi, Amirhossein Moallemi, Amirhossein Zonzini, Federica Brunelli, Davide Rossi, Davide Tagliavini, Giuseppe |
| author_facet | Kiamarzi, Amirhossein Moallemi, Amirhossein Zonzini, Federica Brunelli, Davide Rossi, Davide Tagliavini, Giuseppe |
| contents | The early detection of structural malfunctions requires the installation of real-time monitoring systems ensuring continuous access to the damage-sensitive information; nevertheless, it can generate bottlenecks in terms of bandwidth and storage. Deploying data reduction techniques at the edge is recognized as a proficient solution to reduce the system's network traffic. However, the most effective solutions currently employed for the purpose are based on memory and power-hungry algorithms, making their embedding on resource-constrained devices very challenging; this is the case of vibration data reduction based on System Identification models. This paper presents PARSY-VDD, a fully optimized PArallel end-to-end software framework based on SYstem identification for Vibration-based Damage Detection, as a suitable solution to perform damage detection at the edge in a time and energy-efficient manner, avoiding streaming raw data to the cloud. We evaluate the damage detection capabilities of PARSY-VDD with two benchmarks: a bridge and a wind turbine blade, showcasing the robustness of the end-to-end approach. Then, we deploy PARSY-VDD on both commercial single-core and a specific multi-core edge device. We introduce an architecture-agnostic algorithmic optimization for SysId, improving the execution by 90x and reducing the consumption by 85x compared with the state-of-the-art SysId implementation on GAP9. Results show that by utilizing the unique parallel computing capabilities of GAP9, the execution time is 751μs with the high-performance multi-core solution operating at 370MHz and 0.8V, while the energy consumption is 37μJ with the low-power solution operating at 240MHz and 0.65V. Compared with other single-core implementations based on STM32 microcontrollers, the GAP9 high-performance configuration is 76x faster, while the low-power configuration is 360x more energy efficient. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2504_04884 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Parallelization is All System Identification Needs: End-to-end Vibration Diagnostics on a multi-core RISC-V edge device Kiamarzi, Amirhossein Moallemi, Amirhossein Zonzini, Federica Brunelli, Davide Rossi, Davide Tagliavini, Giuseppe Signal Processing The early detection of structural malfunctions requires the installation of real-time monitoring systems ensuring continuous access to the damage-sensitive information; nevertheless, it can generate bottlenecks in terms of bandwidth and storage. Deploying data reduction techniques at the edge is recognized as a proficient solution to reduce the system's network traffic. However, the most effective solutions currently employed for the purpose are based on memory and power-hungry algorithms, making their embedding on resource-constrained devices very challenging; this is the case of vibration data reduction based on System Identification models. This paper presents PARSY-VDD, a fully optimized PArallel end-to-end software framework based on SYstem identification for Vibration-based Damage Detection, as a suitable solution to perform damage detection at the edge in a time and energy-efficient manner, avoiding streaming raw data to the cloud. We evaluate the damage detection capabilities of PARSY-VDD with two benchmarks: a bridge and a wind turbine blade, showcasing the robustness of the end-to-end approach. Then, we deploy PARSY-VDD on both commercial single-core and a specific multi-core edge device. We introduce an architecture-agnostic algorithmic optimization for SysId, improving the execution by 90x and reducing the consumption by 85x compared with the state-of-the-art SysId implementation on GAP9. Results show that by utilizing the unique parallel computing capabilities of GAP9, the execution time is 751μs with the high-performance multi-core solution operating at 370MHz and 0.8V, while the energy consumption is 37μJ with the low-power solution operating at 240MHz and 0.65V. Compared with other single-core implementations based on STM32 microcontrollers, the GAP9 high-performance configuration is 76x faster, while the low-power configuration is 360x more energy efficient. |
| title | Parallelization is All System Identification Needs: End-to-end Vibration Diagnostics on a multi-core RISC-V edge device |
| topic | Signal Processing |
| url | https://arxiv.org/abs/2504.04884 |