All-in-Memory Stochastic Computing using ReRAM
Fuente:
arXiv
Saved in:
| Main Authors: | de Lima, João Paulo C., Moghadam, Mehran Shoushtari, Aygun, Sercan, Castrillon, Jeronimo, Najafi, M. Hassan, Khan, Asif Ali |
|---|---|
| Format: | Preprint |
| Published: |
2025
|
| Subjects: | |
| Online Access: | |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
Maximizing Memory-Level Parallelism via Integrated Stochastic Logic-in-Memory Architectures
by: Razi, Farzad, et al.
Published: (2026)
by: Razi, Farzad, et al.
Published: (2026)
Sensitivity-Aware Mixed-Precision Quantization for ReRAM-based Computing-in-Memory
by: Chen, Guan-Cheng, et al.
Published: (2025)
by: Chen, Guan-Cheng, et al.
Published: (2025)
ReCross: Efficient Embedding Reduction Scheme for In-Memory Computing using ReRAM-Based Crossbar
by: Lai, Yu-Hong, et al.
Published: (2025)
by: Lai, Yu-Hong, et al.
Published: (2025)
Count2Multiply: Reliable In-Memory High-Radix Counting
by: de Lima, João Paulo Cardoso, et al.
Published: (2024)
by: de Lima, João Paulo Cardoso, et al.
Published: (2024)
Online Soft Error Tolerance in ReRAM Crossbars for Deep Learning Accelerators
by: Khezeli, Benyamin, et al.
Published: (2024)
by: Khezeli, Benyamin, et al.
Published: (2024)
XL-HD: Extended Learning in Hyperdimensional Computing via Deterministic Projections for In-Memory Accelerators
by: Moon, Sabrina Hassan, et al.
Published: (2026)
by: Moon, Sabrina Hassan, et al.
Published: (2026)
All-in-One Analog AI Hardware: On-Chip Training and Inference with Conductive-Metal-Oxide/HfOx ReRAM Devices
by: Falcone, Donato Francesco, et al.
Published: (2025)
by: Falcone, Donato Francesco, et al.
Published: (2025)
Full-Stack Optimization for CAM-Only DNN Inference
by: de Lima, João Paulo C., et al.
Published: (2024)
by: de Lima, João Paulo C., et al.
Published: (2024)
Improved Data Encoding for Emerging Computing Paradigms: From Stochastic to Hyperdimensional Computing
by: Moghadam, Mehran Shoushtari, et al.
Published: (2025)
by: Moghadam, Mehran Shoushtari, et al.
Published: (2025)
Towards Memory Specialization: A Case for Long-Term and Short-Term RAM
by: Li, Peijing, et al.
Published: (2025)
by: Li, Peijing, et al.
Published: (2025)
PICO-RAM: A PVT-Insensitive Analog Compute-In-Memory SRAM Macro with In-Situ Multi-Bit Charge Computing and 6T Thin-Cell-Compatible Layout
by: Chen, Zhiyu, et al.
Published: (2024)
by: Chen, Zhiyu, et al.
Published: (2024)
The Landscape of Compute-near-memory and Compute-in-memory: A Research and Commercial Overview
by: Khan, Asif Ali, et al.
Published: (2024)
by: Khan, Asif Ali, et al.
Published: (2024)
Single-Cell Universal Logic-in-Memory Using 2T-nC FeRAM: An Area and Energy-Efficient Approach for Bulk Bitwise Computation
by: Biswas, Rudra, et al.
Published: (2025)
by: Biswas, Rudra, et al.
Published: (2025)
Stoch-IMC: A Bit-Parallel Stochastic In-Memory Computing Architecture Based on STT-MRAM
by: Hajisadeghi, Amir M., et al.
Published: (2024)
by: Hajisadeghi, Amir M., et al.
Published: (2024)
Efficient In-Memory Acceleration of Sparse Block Diagonal LLMs
by: de Lima, João Paulo Cardoso, et al.
Published: (2025)
by: de Lima, João Paulo Cardoso, et al.
Published: (2025)
Hamun: An Approximate Computation Method to Prolong the Lifespan of ReRAM-Based Accelerators
by: Sabri, Mohammad, et al.
Published: (2025)
by: Sabri, Mohammad, et al.
Published: (2025)
TranSC: Hardware-Aware Design of Transcendental Functions Using Stochastic Logic
by: Moghadam, Mehran, et al.
Published: (2026)
by: Moghadam, Mehran, et al.
Published: (2026)
Computing High-Degree Polynomial Gradients in Memory
by: Bhattacharya, T., et al.
Published: (2024)
by: Bhattacharya, T., et al.
Published: (2024)
FPIA: Field-Programmable Ising Arrays with In-Memory Computing
by: Hutchinson, George Higgins, et al.
Published: (2024)
by: Hutchinson, George Higgins, et al.
Published: (2024)
ARAS: An Adaptive Low-Cost ReRAM-Based Accelerator for DNNs
by: Sabri, Mohammad, et al.
Published: (2024)
by: Sabri, Mohammad, et al.
Published: (2024)
CINM (Cinnamon): A Compilation Infrastructure for Heterogeneous Compute In-Memory and Compute Near-Memory Paradigms
by: Khan, Asif Ali, et al.
Published: (2022)
by: Khan, Asif Ali, et al.
Published: (2022)
MASIM: An Efficient Multi-Array Scheduler for In-Memory SIMD Computation
by: Qian, Xingyue, et al.
Published: (2024)
by: Qian, Xingyue, et al.
Published: (2024)
Antiferromagnetic Tunnel Junctions (AFMTJs) for In-Memory Computing: Modeling and Case Study
by: Choudhary, Yousuf, et al.
Published: (2026)
by: Choudhary, Yousuf, et al.
Published: (2026)
Bayes2IMC: In-Memory Computing for Bayesian Binary Neural Networks
by: Katti, Prabodh, et al.
Published: (2024)
by: Katti, Prabodh, et al.
Published: (2024)
Scalable Digital Compute-in-Memory Ising Machines for Robustness Verification of Binary Neural Networks
by: Vadlamani, Madhav, et al.
Published: (2026)
by: Vadlamani, Madhav, et al.
Published: (2026)
HURRY: Highly Utilized, Reconfigurable ReRAM-based In-situ Accelerator with Multifunctionality
by: Shin, Hery, et al.
Published: (2024)
by: Shin, Hery, et al.
Published: (2024)
A Novel 8T SRAM-Based In-Memory Computing Architecture for MAC-Derived Logical Functions
by: M, Amogh K, et al.
Published: (2025)
by: M, Amogh K, et al.
Published: (2025)
TetrisG-SDK: Efficient Convolutional Layer Mapping with Adaptive Windows and Grouped Convolutions for Fast In-Memory Computing
by: Dong, Ke, et al.
Published: (2026)
by: Dong, Ke, et al.
Published: (2026)
StoX-Net: Stochastic Processing of Partial Sums for Efficient In-Memory Computing DNN Accelerators
by: Rogers, Ethan G, et al.
Published: (2024)
by: Rogers, Ethan G, et al.
Published: (2024)
A Reconfigurable Time-Domain In-Memory Computing Macro using FeFET-Based CAM with Multilevel Delay Calibration in 28 nm CMOS
by: Mattar, Jeries, et al.
Published: (2025)
by: Mattar, Jeries, et al.
Published: (2025)
DIRC-RAG: Accelerating Edge RAG with Robust High-Density and High-Loading-Bandwidth Digital In-ReRAM Computation
by: Shao, Kunming, et al.
Published: (2025)
by: Shao, Kunming, et al.
Published: (2025)
Modeling and Simulation Frameworks for Processing-in-Memory Architectures
by: Aghaei, Mahdi, et al.
Published: (2025)
by: Aghaei, Mahdi, et al.
Published: (2025)
A Fully Hardware Implemented Accelerator Design in ReRAM Analog Computing without ADCs
by: Dang, Peng, et al.
Published: (2024)
by: Dang, Peng, et al.
Published: (2024)
Architectural and System Implications of CXL-enabled Tiered Memory
by: Yang, Yujie, et al.
Published: (2025)
by: Yang, Yujie, et al.
Published: (2025)
Apparate: Evading Memory Hierarchy with GodSpeed Wireless-on-Chip
by: GS, Nitesh Narayana, et al.
Published: (2024)
by: GS, Nitesh Narayana, et al.
Published: (2024)
Analog-to-Stochastic Converter Using Magnetic Tunnel Junction Devices for Vision Chips
by: Onizawa, Naoya, et al.
Published: (2026)
by: Onizawa, Naoya, et al.
Published: (2026)
Content Addressable Memory Design with Reference Resistor for Improved Search Resolution
by: Narla, Siri, et al.
Published: (2025)
by: Narla, Siri, et al.
Published: (2025)
Algorithm-hardware co-design for Energy-Efficient A/D conversion in ReRAM-based accelerators
by: Zhang, Chenguang, et al.
Published: (2024)
by: Zhang, Chenguang, et al.
Published: (2024)
SMART-WRITE: Adaptive Learning-based Write Energy Optimization for Phase Change Memory
by: Desai, Mahek, et al.
Published: (2025)
by: Desai, Mahek, et al.
Published: (2025)
CXLRAMSim v1.0: System-Level Exploration of CXL Memory Expander Cards
by: Pathak, Karan, et al.
Published: (2026)
by: Pathak, Karan, et al.
Published: (2026)
Similar Items
-
Maximizing Memory-Level Parallelism via Integrated Stochastic Logic-in-Memory Architectures
by: Razi, Farzad, et al.
Published: (2026) -
Sensitivity-Aware Mixed-Precision Quantization for ReRAM-based Computing-in-Memory
by: Chen, Guan-Cheng, et al.
Published: (2025) -
ReCross: Efficient Embedding Reduction Scheme for In-Memory Computing using ReRAM-Based Crossbar
by: Lai, Yu-Hong, et al.
Published: (2025) -
Count2Multiply: Reliable In-Memory High-Radix Counting
by: de Lima, João Paulo Cardoso, et al.
Published: (2024) -
Online Soft Error Tolerance in ReRAM Crossbars for Deep Learning Accelerators
by: Khezeli, Benyamin, et al.
Published: (2024)