ApproXAI: Energy-Efficient Hardware Acceleration of Explainable AI using Approximate Computing
Fuente:
arXiv
Saved in:
| Main Authors: | Siddique, Ayesha, Khalil, Khurram, Hoque, Khaza Anuarul |
|---|---|
| Format: | Preprint |
| Published: |
2025
|
| Subjects: | |
| Online Access: | |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
Explainable AI-Guided Efficient Approximate DNN Generation for Multi-Pod Systolic Arrays
by: Siddique, Ayesha, et al.
Published: (2025)
by: Siddique, Ayesha, et al.
Published: (2025)
FlipLLM: Efficient Bit-Flip Attacks on Multimodal LLMs using Reinforcement Learning
by: Khalil, Khurram, et al.
Published: (2025)
by: Khalil, Khurram, et al.
Published: (2025)
EPSILON: Adaptive Fault Mitigation in Approximate Deep Neural Network using Statistical Signatures
by: Khalil, Khurram, et al.
Published: (2025)
by: Khalil, Khurram, et al.
Published: (2025)
Using the Abstract Computer Architecture Description Language to Model AI Hardware Accelerators
by: Müller, Mika Markus, et al.
Published: (2024)
by: Müller, Mika Markus, et al.
Published: (2024)
TOGGLE: Temporal Logic-Guided Large Language Model Compression for Edge
by: Khalil, Khurram, et al.
Published: (2025)
by: Khalil, Khurram, et al.
Published: (2025)
A Configurable and Efficient Memory Hierarchy for Neural Network Hardware Accelerator
by: Bause, Oliver, et al.
Published: (2024)
by: Bause, Oliver, et al.
Published: (2024)
RIFT: A Scalable Methodology for LLM Accelerator Fault Assessment using Reinforcement Learning
by: Khalil, Khurram, et al.
Published: (2025)
by: Khalil, Khurram, et al.
Published: (2025)
A Fully Hardware Implemented Accelerator Design in ReRAM Analog Computing without ADCs
by: Dang, Peng, et al.
Published: (2024)
by: Dang, Peng, et al.
Published: (2024)
Salca: A Sparsity-Aware Hardware Accelerator for Efficient Long-Context Attention Decoding
by: Fan, Wang, et al.
Published: (2026)
by: Fan, Wang, et al.
Published: (2026)
Towards Efficient IMC Accelerator Design Through Joint Hardware-Workload Co-optimization
by: Krestinskaya, Olga, et al.
Published: (2024)
by: Krestinskaya, Olga, et al.
Published: (2024)
ElasticAI: Creating and Deploying Energy-Efficient Deep Learning Accelerator for Pervasive Computing
by: Qian, Chao, et al.
Published: (2024)
by: Qian, Chao, et al.
Published: (2024)
Towards Efficient Neuro-Symbolic AI: From Workload Characterization to Hardware Architecture
by: Wan, Zishen, et al.
Published: (2024)
by: Wan, Zishen, et al.
Published: (2024)
BETA: Binarized Energy-Efficient Transformer Accelerator at the Edge
by: Ji, Yuhao, et al.
Published: (2024)
by: Ji, Yuhao, et al.
Published: (2024)
Hardware Acceleration of LLMs: A comprehensive survey and comparison
by: Koilia, Nikoletta, et al.
Published: (2024)
by: Koilia, Nikoletta, et al.
Published: (2024)
Hey AI, Generate Me a Hardware Code! Agentic AI-based Hardware Design & Verification
by: Gadde, Deepak Narayan, et al.
Published: (2025)
by: Gadde, Deepak Narayan, et al.
Published: (2025)
Comprehensive Design Space Exploration for Tensorized Neural Network Hardware Accelerators
by: Zhang, Jinsong, et al.
Published: (2025)
by: Zhang, Jinsong, et al.
Published: (2025)
Hardware Efficient Approximate Convolution with Tunable Error Tolerance for CNNs
by: Shashidhar, Vishal, et al.
Published: (2026)
by: Shashidhar, Vishal, et al.
Published: (2026)
GRAU: Generic Reconfigurable Activation Unit Design for Neural Network Hardware Accelerators
by: Liu, Yuhao, et al.
Published: (2026)
by: Liu, Yuhao, et al.
Published: (2026)
MICSim: A Modular Simulator for Mixed-signal Compute-in-Memory based AI Accelerator
by: Wang, Cong, et al.
Published: (2024)
by: Wang, Cong, et al.
Published: (2024)
Accelerating Post-Quantum Cryptography via LLM-Driven Hardware-Software Co-Design
by: Liao, Yuchao, et al.
Published: (2026)
by: Liao, Yuchao, et al.
Published: (2026)
Enabling Physical AI at the Edge: Hardware-Accelerated Recovery of System Dynamics
by: Xu, Bin, et al.
Published: (2025)
by: Xu, Bin, et al.
Published: (2025)
Bitwise Systolic Array Architecture for Runtime-Reconfigurable Multi-precision Quantized Multiplication on Hardware Accelerators
by: Liu, Yuhao, et al.
Published: (2026)
by: Liu, Yuhao, et al.
Published: (2026)
BiKA: Kolmogorov-Arnold-Network-inspired Ultra Lightweight Neural Network Hardware Accelerator
by: Liu, Yuhao, et al.
Published: (2026)
by: Liu, Yuhao, et al.
Published: (2026)
HADES: Hardware Accelerated Decoding for Efficient Speculation in Large Language Models
by: Yang, Ze, et al.
Published: (2024)
by: Yang, Ze, et al.
Published: (2024)
NLS: Natural-Level Synthesis for Hardware Implementation Through GenAI
by: Yang, Kaiyuan, et al.
Published: (2025)
by: Yang, Kaiyuan, et al.
Published: (2025)
SA-Kura: An Energy-Efficient Systolic Array Accelerator for Locally-Coupled Kuramoto Drift in Diffusion Sampling
by: Jin, Jeongmin, et al.
Published: (2026)
by: Jin, Jeongmin, et al.
Published: (2026)
EdgeCIM: A Hardware-Software Co-Design for CIM-Based Acceleration of Small Language Models
by: Bazzi, Jinane, et al.
Published: (2026)
by: Bazzi, Jinane, et al.
Published: (2026)
CiMNet: Towards Joint Optimization for DNN Architecture and Configuration for Compute-In-Memory Hardware
by: Kundu, Souvik, et al.
Published: (2024)
by: Kundu, Souvik, et al.
Published: (2024)
HiAER-Spike Software-Hardware Reconfigurable Platform for Event-Driven Neuromorphic Computing at Scale
by: Frank, Gwenevere, et al.
Published: (2026)
by: Frank, Gwenevere, et al.
Published: (2026)
Life-Cycle Emissions of AI Hardware: A Cradle-To-Grave Approach and Generational Trends
by: Schneider, Ian, et al.
Published: (2025)
by: Schneider, Ian, et al.
Published: (2025)
Panacea: Novel DNN Accelerator using Accuracy-Preserving Asymmetric Quantization and Energy-Saving Bit-Slice Sparsity
by: Kam, Dongyun, et al.
Published: (2024)
by: Kam, Dongyun, et al.
Published: (2024)
Beyond Moore's Law: Harnessing the Redshift of Generative AI with Effective Hardware-Software Co-Design
by: Yazdanbakhsh, Amir
Published: (2025)
by: Yazdanbakhsh, Amir
Published: (2025)
Hardware-Efficient FPGA Implementation of Sigmoid Function Using Mixed-Radix Hyperbolic Rotation CORDIC
by: Panchal, Chintan, et al.
Published: (2026)
by: Panchal, Chintan, et al.
Published: (2026)
TRAM: Training Approximate Multiplier Structures for Low-Power AI Accelerators
by: Meng, Chang, et al.
Published: (2026)
by: Meng, Chang, et al.
Published: (2026)
Exploring the Potential of Wireless-enabled Multi-Chip AI Accelerators
by: Irabor, Emmanuel, et al.
Published: (2025)
by: Irabor, Emmanuel, et al.
Published: (2025)
Karatsuba Matrix Multiplication and its Efficient Custom Hardware Implementations
by: Pogue, Trevor E., et al.
Published: (2025)
by: Pogue, Trevor E., et al.
Published: (2025)
Chiplet-Based RISC-V SoC with Modular AI Acceleration
by: Bharadwaj, Suhas Suresh, et al.
Published: (2025)
by: Bharadwaj, Suhas Suresh, et al.
Published: (2025)
A3D: Agentic AI flow for autonomous Accelerator Design
by: Nallathambi, Abinand, et al.
Published: (2026)
by: Nallathambi, Abinand, et al.
Published: (2026)
MC$^2$A: Enabling Algorithm-Hardware Co-Design for Efficient Markov Chain Monte Carlo Acceleration
by: Zhao, Shirui, et al.
Published: (2025)
by: Zhao, Shirui, et al.
Published: (2025)
KAN-SAs: Efficient Acceleration of Kolmogorov-Arnold Networks on Systolic Arrays
by: Errabii, Sohaib, et al.
Published: (2025)
by: Errabii, Sohaib, et al.
Published: (2025)
Similar Items
-
Explainable AI-Guided Efficient Approximate DNN Generation for Multi-Pod Systolic Arrays
by: Siddique, Ayesha, et al.
Published: (2025) -
FlipLLM: Efficient Bit-Flip Attacks on Multimodal LLMs using Reinforcement Learning
by: Khalil, Khurram, et al.
Published: (2025) -
EPSILON: Adaptive Fault Mitigation in Approximate Deep Neural Network using Statistical Signatures
by: Khalil, Khurram, et al.
Published: (2025) -
Using the Abstract Computer Architecture Description Language to Model AI Hardware Accelerators
by: Müller, Mika Markus, et al.
Published: (2024) -
TOGGLE: Temporal Logic-Guided Large Language Model Compression for Edge
by: Khalil, Khurram, et al.
Published: (2025)