FlexiNS: A SmartNIC-Centric, Line-Rate and Flexible Network Stack
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| Main Authors: | , , , , , , , , , |
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| Format: | Preprint |
| Published: |
2025
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| _version_ | 1866908337708204032 |
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| author | Chen, Xuzheng Zhang, Jie Zhu, Baolin Zhu, Xueying Chen, Zhongqing Ma, Shu Zhu, Lingjun Shi, Chao Zhang, Yin Wang, Zeke |
| author_facet | Chen, Xuzheng Zhang, Jie Zhu, Baolin Zhu, Xueying Chen, Zhongqing Ma, Shu Zhu, Lingjun Shi, Chao Zhang, Yin Wang, Zeke |
| contents | As the gap between network and CPU speeds rapidly increases, the CPU-centric network stack proves inadequate due to excessive CPU and memory overhead. While hardware-offloaded network stacks alleviate these issues, they suffer from limited flexibility in both control and data planes. Offloading network stack to off-path SmartNIC seems promising to provide high flexibility; however, throughput remains constrained by inherent SmartNIC architectural limitations.
To this end, we design FlexiNS, a SmartNIC-centric network stack with software transport programmability and line-rate packet processing capabilities. To grapple with the limitation of SmartNIC-induced challenges, FlexiNS introduces: (a) a header-only offloading TX path; (b) an unlimited-working-set in-cache processing RX path; (c) a high-performance DMA-only notification pipe; and (d) a programmable offloading engine. We prototype FlexiNS using Nvidia BlueField-3 SmartNIC and provide out-of-the-box RDMA IBV verbs compatibility to users. FlexiNS achieves 2.2$\times$ higher throughput than the microkernel-based baseline in block storage disaggregation and 1.3$\times$ higher throughput than the hardware-offloaded baseline in KVCache transfer. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2504_18432 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | FlexiNS: A SmartNIC-Centric, Line-Rate and Flexible Network Stack Chen, Xuzheng Zhang, Jie Zhu, Baolin Zhu, Xueying Chen, Zhongqing Ma, Shu Zhu, Lingjun Shi, Chao Zhang, Yin Wang, Zeke Networking and Internet Architecture As the gap between network and CPU speeds rapidly increases, the CPU-centric network stack proves inadequate due to excessive CPU and memory overhead. While hardware-offloaded network stacks alleviate these issues, they suffer from limited flexibility in both control and data planes. Offloading network stack to off-path SmartNIC seems promising to provide high flexibility; however, throughput remains constrained by inherent SmartNIC architectural limitations. To this end, we design FlexiNS, a SmartNIC-centric network stack with software transport programmability and line-rate packet processing capabilities. To grapple with the limitation of SmartNIC-induced challenges, FlexiNS introduces: (a) a header-only offloading TX path; (b) an unlimited-working-set in-cache processing RX path; (c) a high-performance DMA-only notification pipe; and (d) a programmable offloading engine. We prototype FlexiNS using Nvidia BlueField-3 SmartNIC and provide out-of-the-box RDMA IBV verbs compatibility to users. FlexiNS achieves 2.2$\times$ higher throughput than the microkernel-based baseline in block storage disaggregation and 1.3$\times$ higher throughput than the hardware-offloaded baseline in KVCache transfer. |
| title | FlexiNS: A SmartNIC-Centric, Line-Rate and Flexible Network Stack |
| topic | Networking and Internet Architecture |
| url | https://arxiv.org/abs/2504.18432 |