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Main Authors: Lin, Ching-Yi, Shah, Sahil
Format: Preprint
Published: 2025
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Online Access:https://arxiv.org/abs/2504.18547
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author Lin, Ching-Yi
Shah, Sahil
author_facet Lin, Ching-Yi
Shah, Sahil
contents Pre-trained vision transformers have achieved remarkable performance across various visual tasks but suffer from expensive computational and memory costs. While model quantization reduces memory usage by lowering precision, these models still incur significant computational overhead due to the dequantization before matrix operations. In this work, we analyze the computation graph and propose an integerization process based on operation reordering. Specifically, the process delays dequantization until after matrix operations. This enables integerized matrix multiplication and linear module by directly processing the quantized input. To validate our approach, we synthesize the self-attention module of ViT on a systolic array-based hardware. Experimental results show that our low-bit inference reduces per-PE power consumption for linear layer and matrix multiplication, bridging the gap between quantized models and efficient inference.
format Preprint
id arxiv_https___arxiv_org_abs_2504_18547
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Low-Bit Integerization of Vision Transformers using Operand Reordering for Efficient Hardware
Lin, Ching-Yi
Shah, Sahil
Machine Learning
Computer Vision and Pattern Recognition
Systems and Control
Pre-trained vision transformers have achieved remarkable performance across various visual tasks but suffer from expensive computational and memory costs. While model quantization reduces memory usage by lowering precision, these models still incur significant computational overhead due to the dequantization before matrix operations. In this work, we analyze the computation graph and propose an integerization process based on operation reordering. Specifically, the process delays dequantization until after matrix operations. This enables integerized matrix multiplication and linear module by directly processing the quantized input. To validate our approach, we synthesize the self-attention module of ViT on a systolic array-based hardware. Experimental results show that our low-bit inference reduces per-PE power consumption for linear layer and matrix multiplication, bridging the gap between quantized models and efficient inference.
title Low-Bit Integerization of Vision Transformers using Operand Reordering for Efficient Hardware
topic Machine Learning
Computer Vision and Pattern Recognition
Systems and Control
url https://arxiv.org/abs/2504.18547