Leveraging Neural Graph Compilers in Machine Learning Research for Edge-Cloud Systems

Fuente: arXiv
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Autores principales: Furutanpey, Alireza, Walser, Carmen, Raith, Philipp, Frangoudis, Pantelis A., Dustdar, Schahram
Formato: Preprint
Publicado: 2025
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author Furutanpey, Alireza
Walser, Carmen
Raith, Philipp
Frangoudis, Pantelis A.
Dustdar, Schahram
author_facet Furutanpey, Alireza
Walser, Carmen
Raith, Philipp
Frangoudis, Pantelis A.
Dustdar, Schahram
contents This work presents a comprehensive evaluation of neural network graph compilers across heterogeneous hardware platforms, addressing the critical gap between theoretical optimization techniques and practical deployment scenarios. We demonstrate how vendor-specific optimizations can invalidate relative performance comparisons between architectural archetypes, with performance advantages sometimes completely reversing after compilation. Our systematic analysis reveals that graph compilers exhibit performance patterns highly dependent on both neural architecture and batch sizes. Through fine-grained block-level experimentation, we establish that vendor-specific compilers can leverage repeated patterns in simple architectures, yielding disproportionate throughput gains as model depth increases. We introduce novel metrics to quantify a compiler's ability to mitigate performance friction as batch size increases. Our methodology bridges the gap between academic research and practical deployment by incorporating compiler effects throughout the research process, providing actionable insights for practitioners navigating complex optimization landscapes across heterogeneous hardware environments.
format Preprint
id arxiv_https___arxiv_org_abs_2504_20198
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Leveraging Neural Graph Compilers in Machine Learning Research for Edge-Cloud Systems
Furutanpey, Alireza
Walser, Carmen
Raith, Philipp
Frangoudis, Pantelis A.
Dustdar, Schahram
Distributed, Parallel, and Cluster Computing
Machine Learning
This work presents a comprehensive evaluation of neural network graph compilers across heterogeneous hardware platforms, addressing the critical gap between theoretical optimization techniques and practical deployment scenarios. We demonstrate how vendor-specific optimizations can invalidate relative performance comparisons between architectural archetypes, with performance advantages sometimes completely reversing after compilation. Our systematic analysis reveals that graph compilers exhibit performance patterns highly dependent on both neural architecture and batch sizes. Through fine-grained block-level experimentation, we establish that vendor-specific compilers can leverage repeated patterns in simple architectures, yielding disproportionate throughput gains as model depth increases. We introduce novel metrics to quantify a compiler's ability to mitigate performance friction as batch size increases. Our methodology bridges the gap between academic research and practical deployment by incorporating compiler effects throughout the research process, providing actionable insights for practitioners navigating complex optimization landscapes across heterogeneous hardware environments.
title Leveraging Neural Graph Compilers in Machine Learning Research for Edge-Cloud Systems
topic Distributed, Parallel, and Cluster Computing
Machine Learning
url https://arxiv.org/abs/2504.20198