Hardware vs. Software Implementation of Warp-Level Features in Vortex RISC-V GPU
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arXiv
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| Main Authors: | , , , , , , , |
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| Format: | Preprint |
| Published: |
2025
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| _version_ | 1866912362014965760 |
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| author | Pu, Huanzhi Ravi, Rishabh Jeong, Shinnung Subramanya, Udit Chung, Euijun Zhao, Jisheng Ahn, Chihyo Kim, Hyesoon |
| author_facet | Pu, Huanzhi Ravi, Rishabh Jeong, Shinnung Subramanya, Udit Chung, Euijun Zhao, Jisheng Ahn, Chihyo Kim, Hyesoon |
| contents | RISC-V GPUs present a promising path for supporting GPU applications. Traditionally, GPUs achieve high efficiency through the SPMD (Single Program Multiple Data) programming model. However, modern GPU programming increasingly relies on warp-level features, which diverge from the conventional SPMD paradigm. In this paper, we explore how RISC-V GPUs can support these warp-level features both through hardware implementation and via software-only approaches. Our evaluation shows that a hardware implementation achieves up to 4 times geomean IPC speedup in microbenchmarks, while software-based solutions provide a viable alternative for area-constrained scenarios. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2505_03102 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Hardware vs. Software Implementation of Warp-Level Features in Vortex RISC-V GPU Pu, Huanzhi Ravi, Rishabh Jeong, Shinnung Subramanya, Udit Chung, Euijun Zhao, Jisheng Ahn, Chihyo Kim, Hyesoon Hardware Architecture RISC-V GPUs present a promising path for supporting GPU applications. Traditionally, GPUs achieve high efficiency through the SPMD (Single Program Multiple Data) programming model. However, modern GPU programming increasingly relies on warp-level features, which diverge from the conventional SPMD paradigm. In this paper, we explore how RISC-V GPUs can support these warp-level features both through hardware implementation and via software-only approaches. Our evaluation shows that a hardware implementation achieves up to 4 times geomean IPC speedup in microbenchmarks, while software-based solutions provide a viable alternative for area-constrained scenarios. |
| title | Hardware vs. Software Implementation of Warp-Level Features in Vortex RISC-V GPU |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2505.03102 |