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CVA6S+: A Superscalar RISC-V Core with High-Throughput Memory Architecture

Fuente: arXiv

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Bibliographic Details
Main Authors:	Tedeschi, Riccardo, Ottavi, Gianmarco, Allart, Côme, Wistoff, Nils, Fu, Zexin, Grillotti, Filippo, De Ambroggi, Fabio, Guidetti, Elio, Rigaud, Jean-Baptiste, Potin, Olivier, Coulon, Jean Roch, Fuguet, César, Benini, Luca, Rossi, Davide
Format:	Preprint
Published:	2025
Subjects:	Hardware Architecture
Online Access:	Acceder al recurso
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