Further Characterisation of Digital Pixel Test Structures Implemented in a 65 nm CMOS Process

Fuente: arXiv

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Hauptverfasser:	Rinella, Gianluca Aglieri, Apadula, Nicole, Andronic, Anton, Antonelli, Matias, Aresti, Mauro, Baccomi, Roberto, Becht, Pascal, Beole, Stefania, Borri, Marcello, Braach, Justus, Buckland, Matthew Daniel, Buschmann, Eric, Camerini, Paolo, Carnesecchi, Francesca, Cecconi, Leonardo, Charbon, Edoardo, Contin, Giacomo, Dannheim, Dominik, de Melo, Joao, Deng, Wenjing, di Mauro, Antonello, Hasenbichler, Jan, Hillemanns, Hartmut, Hong, Geun Hee, Isakov, Artem, Jang, Hangil, Junique, Antoine, Kim, Minjung, Kluge, Alex, Kotliarov, Artem, Křížek, Filip, Lautner, Lukas, Lim, Sanghoon, Mager, Magnus, Marras, Davide, Martinengo, Paolo, Masciocchi, Silvia, Menzel, Marius Wilm, Munker, Magdalena, Piro, Francesco, Rachevski, Alexandre, Rebane, Karoliina, Reidt, Felix, Russo, Roberto, Sanna, Isabella, Sarritzu, Valerio, Senyukov, Serhiy, Snoeys, Walter, Sonneveld, Jory, Šuljić, Miljenko, Svihra, Peter, Tiltmann, Nicolas, Di Trapani, Vittorio, Usai, Gianluca, Van Beelen, Jacob Bastiaan, Vassilev, Mirella Dimitrova, Vernieri, Caterina, Villani, Anna
Format:	Preprint
Veröffentlicht:	2025
Schlagworte:	Instrumentation and Detectors
Online-Zugang:	Acceder al recurso
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_version_	1866911205121064960
author	Rinella, Gianluca Aglieri Apadula, Nicole Andronic, Anton Antonelli, Matias Aresti, Mauro Baccomi, Roberto Becht, Pascal Beole, Stefania Borri, Marcello Braach, Justus Buckland, Matthew Daniel Buschmann, Eric Camerini, Paolo Carnesecchi, Francesca Cecconi, Leonardo Charbon, Edoardo Contin, Giacomo Dannheim, Dominik de Melo, Joao Deng, Wenjing di Mauro, Antonello Hasenbichler, Jan Hillemanns, Hartmut Hong, Geun Hee Isakov, Artem Jang, Hangil Junique, Antoine Kim, Minjung Kluge, Alex Kotliarov, Artem Křížek, Filip Lautner, Lukas Lim, Sanghoon Mager, Magnus Marras, Davide Martinengo, Paolo Masciocchi, Silvia Menzel, Marius Wilm Munker, Magdalena Piro, Francesco Rachevski, Alexandre Rebane, Karoliina Reidt, Felix Russo, Roberto Sanna, Isabella Sarritzu, Valerio Senyukov, Serhiy Snoeys, Walter Sonneveld, Jory Šuljić, Miljenko Svihra, Peter Tiltmann, Nicolas Di Trapani, Vittorio Usai, Gianluca Van Beelen, Jacob Bastiaan Vassilev, Mirella Dimitrova Vernieri, Caterina Villani, Anna
author_facet	Rinella, Gianluca Aglieri Apadula, Nicole Andronic, Anton Antonelli, Matias Aresti, Mauro Baccomi, Roberto Becht, Pascal Beole, Stefania Borri, Marcello Braach, Justus Buckland, Matthew Daniel Buschmann, Eric Camerini, Paolo Carnesecchi, Francesca Cecconi, Leonardo Charbon, Edoardo Contin, Giacomo Dannheim, Dominik de Melo, Joao Deng, Wenjing di Mauro, Antonello Hasenbichler, Jan Hillemanns, Hartmut Hong, Geun Hee Isakov, Artem Jang, Hangil Junique, Antoine Kim, Minjung Kluge, Alex Kotliarov, Artem Křížek, Filip Lautner, Lukas Lim, Sanghoon Mager, Magnus Marras, Davide Martinengo, Paolo Masciocchi, Silvia Menzel, Marius Wilm Munker, Magdalena Piro, Francesco Rachevski, Alexandre Rebane, Karoliina Reidt, Felix Russo, Roberto Sanna, Isabella Sarritzu, Valerio Senyukov, Serhiy Snoeys, Walter Sonneveld, Jory Šuljić, Miljenko Svihra, Peter Tiltmann, Nicolas Di Trapani, Vittorio Usai, Gianluca Van Beelen, Jacob Bastiaan Vassilev, Mirella Dimitrova Vernieri, Caterina Villani, Anna
contents	The next generation of MAPS for future tracking detectors will have to meet stringent requirements placed on them. One such detector is the ALICE ITS3 that aims to be very light at 0.07% X/X$_{0}$ per layer and have a low power consumption in the active area of 40 mW/cm$^{2}$ by implementing wafer-scale MAPS bent into cylindrical half layers. To address these challenging requirements, the ALICE ITS3 project, in conjunction with the CERN EP R&D on monolithic pixel sensors, proposed the Tower Partners Semiconductor Co. 65 nm CMOS process as the starting point for the sensor. After the initial results confirmed the detection efficiency and radiation hardness, the choice of the technology was solidified by demonstrating the feasibility of operating MAPS in low-power consumption regimes, < 50 mW/cm$^{2}$, while maintaining high-quality performance. This was shown through a detailed characterisation of the Digital Pixel Test Structure (DPTS) prototype exposed to X-rays and ionising beams, and the results are presented in this article. Additionally, the sensor was further investigated through studies of the fake-hit rate, the linearity of the front-end in the range 1.7-28 keV, the performance after ionising irradiation, and the detection efficiency of inclined tracks in the range 0-45$^\circ$.
format	Preprint
id	arxiv_https___arxiv_org_abs_2505_05867
institution	arXiv
publishDate	2025
record_format	arxiv
spellingShingle	Further Characterisation of Digital Pixel Test Structures Implemented in a 65 nm CMOS Process Rinella, Gianluca Aglieri Apadula, Nicole Andronic, Anton Antonelli, Matias Aresti, Mauro Baccomi, Roberto Becht, Pascal Beole, Stefania Borri, Marcello Braach, Justus Buckland, Matthew Daniel Buschmann, Eric Camerini, Paolo Carnesecchi, Francesca Cecconi, Leonardo Charbon, Edoardo Contin, Giacomo Dannheim, Dominik de Melo, Joao Deng, Wenjing di Mauro, Antonello Hasenbichler, Jan Hillemanns, Hartmut Hong, Geun Hee Isakov, Artem Jang, Hangil Junique, Antoine Kim, Minjung Kluge, Alex Kotliarov, Artem Křížek, Filip Lautner, Lukas Lim, Sanghoon Mager, Magnus Marras, Davide Martinengo, Paolo Masciocchi, Silvia Menzel, Marius Wilm Munker, Magdalena Piro, Francesco Rachevski, Alexandre Rebane, Karoliina Reidt, Felix Russo, Roberto Sanna, Isabella Sarritzu, Valerio Senyukov, Serhiy Snoeys, Walter Sonneveld, Jory Šuljić, Miljenko Svihra, Peter Tiltmann, Nicolas Di Trapani, Vittorio Usai, Gianluca Van Beelen, Jacob Bastiaan Vassilev, Mirella Dimitrova Vernieri, Caterina Villani, Anna Instrumentation and Detectors The next generation of MAPS for future tracking detectors will have to meet stringent requirements placed on them. One such detector is the ALICE ITS3 that aims to be very light at 0.07% X/X$_{0}$ per layer and have a low power consumption in the active area of 40 mW/cm$^{2}$ by implementing wafer-scale MAPS bent into cylindrical half layers. To address these challenging requirements, the ALICE ITS3 project, in conjunction with the CERN EP R&D on monolithic pixel sensors, proposed the Tower Partners Semiconductor Co. 65 nm CMOS process as the starting point for the sensor. After the initial results confirmed the detection efficiency and radiation hardness, the choice of the technology was solidified by demonstrating the feasibility of operating MAPS in low-power consumption regimes, < 50 mW/cm$^{2}$, while maintaining high-quality performance. This was shown through a detailed characterisation of the Digital Pixel Test Structure (DPTS) prototype exposed to X-rays and ionising beams, and the results are presented in this article. Additionally, the sensor was further investigated through studies of the fake-hit rate, the linearity of the front-end in the range 1.7-28 keV, the performance after ionising irradiation, and the detection efficiency of inclined tracks in the range 0-45$^\circ$.
title	Further Characterisation of Digital Pixel Test Structures Implemented in a 65 nm CMOS Process
topic	Instrumentation and Detectors
url	https://arxiv.org/abs/2505.05867