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| Main Author: | |
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| Format: | Preprint |
| Published: |
2025
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| Subjects: | |
| Online Access: | https://arxiv.org/abs/2505.06728 |
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| _version_ | 1866908359578353664 |
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| author | Salishev, Sergey |
| author_facet | Salishev, Sergey |
| contents | The generic vector memory based accelerator is considered which supports DIT and DIF FFT with fixed datapath. The regular mixed-radix factorization of the DFT matrix coherent with the accelerator architecture is proposed and the correction proof is presented. It allows better understanding of architecture requirements and simplifies the developing and proving correctness of more complicated algorithms and conflict-free addressing schemes. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2505_06728 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Regular mixed-radix DFT matrix factorization for in-place FFT accelerators Salishev, Sergey Hardware Architecture Distributed, Parallel, and Cluster Computing Data Structures and Algorithms Numerical Analysis B.2.4 The generic vector memory based accelerator is considered which supports DIT and DIF FFT with fixed datapath. The regular mixed-radix factorization of the DFT matrix coherent with the accelerator architecture is proposed and the correction proof is presented. It allows better understanding of architecture requirements and simplifies the developing and proving correctness of more complicated algorithms and conflict-free addressing schemes. |
| title | Regular mixed-radix DFT matrix factorization for in-place FFT accelerators |
| topic | Hardware Architecture Distributed, Parallel, and Cluster Computing Data Structures and Algorithms Numerical Analysis B.2.4 |
| url | https://arxiv.org/abs/2505.06728 |