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| Main Authors: | , , , |
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| Format: | Preprint |
| Published: |
2025
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| Subjects: | |
| Online Access: | https://arxiv.org/abs/2505.06847 |
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| _version_ | 1866912369972609024 |
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| author | Prabhu, Ganesh Rodrigues, Steevan Chiplunkar, Niranjan C, Niranjan U. |
| author_facet | Prabhu, Ganesh Rodrigues, Steevan Chiplunkar, Niranjan C, Niranjan U. |
| contents | The software configurable processor finds best use in the embedded systems. These processors have onchip logic like FPGA (Field Programmable Gate Array) and thus can be configured to implement custom hardware functionality. The digital computing tasks that need to accelerate in hardware can be compiled down to a configuration file or bit stream that contains the information on how the logic components are configured and wired together. Video and image processing applications perform repeated pixel transformation and thus consume more power and the processing time. Software configurable processor best accelerates such compute intensive applications. This paper mainly focuses on the implementation of an image processing application called median filtering on a single processor and colour conversion algorithm on array of SCPs(Software Configurable Processors). Median filtering result on Digital Video Recorder (DVR) is discussed as a realtime application of SCP. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2505_06847 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Image processing Application Development on Software Configurable Processor Array Prabhu, Ganesh Rodrigues, Steevan Chiplunkar, Niranjan C, Niranjan U. Hardware Architecture The software configurable processor finds best use in the embedded systems. These processors have onchip logic like FPGA (Field Programmable Gate Array) and thus can be configured to implement custom hardware functionality. The digital computing tasks that need to accelerate in hardware can be compiled down to a configuration file or bit stream that contains the information on how the logic components are configured and wired together. Video and image processing applications perform repeated pixel transformation and thus consume more power and the processing time. Software configurable processor best accelerates such compute intensive applications. This paper mainly focuses on the implementation of an image processing application called median filtering on a single processor and colour conversion algorithm on array of SCPs(Software Configurable Processors). Median filtering result on Digital Video Recorder (DVR) is discussed as a realtime application of SCP. |
| title | Image processing Application Development on Software Configurable Processor Array |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2505.06847 |