Enabling Syscall Intercept for RISC-V
Fuente:
arXiv
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| Auteurs principaux: | , , |
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| Format: | Preprint |
| Publié: |
2025
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| _version_ | 1866912376904744960 |
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| author | Andrić, Petar Call, Aaron Nou, Ramon |
| author_facet | Andrić, Petar Call, Aaron Nou, Ramon |
| contents | The European Union technological sovereignty strategy centers around the RISC-V Instruction Set Architecture, with the European Processor Initiative leading efforts to build production-ready processors. Focusing on realizing a functional RISC-V ecosystem, the BZL initiative (www.bzl.es) is making an effort to create a software stack along with the hardware. In this work, we detail the efforts made in porting a widely used syscall interception library, mainly used on AdHocFS (i.e., DAOS, GekkoFS), to RISC-V and how we overcame some of the limitations encountered. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2505_10217 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Enabling Syscall Intercept for RISC-V Andrić, Petar Call, Aaron Nou, Ramon Operating Systems Hardware Architecture The European Union technological sovereignty strategy centers around the RISC-V Instruction Set Architecture, with the European Processor Initiative leading efforts to build production-ready processors. Focusing on realizing a functional RISC-V ecosystem, the BZL initiative (www.bzl.es) is making an effort to create a software stack along with the hardware. In this work, we detail the efforts made in porting a widely used syscall interception library, mainly used on AdHocFS (i.e., DAOS, GekkoFS), to RISC-V and how we overcame some of the limitations encountered. |
| title | Enabling Syscall Intercept for RISC-V |
| topic | Operating Systems Hardware Architecture |
| url | https://arxiv.org/abs/2505.10217 |