A Virtual Admittance-Based Fault Current Limiting Method for Grid-Forming Inverters
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arXiv
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| Autores principales: | , , |
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| Formato: | Preprint |
| Publicado: |
2025
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| _version_ | 1866916739324837888 |
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| author | Mahmood, Zaid Ibn Cui, Hantao Zhang, Ying |
| author_facet | Mahmood, Zaid Ibn Cui, Hantao Zhang, Ying |
| contents | Inverter-based resources (IBRs) are a key component in the ongoing modernization of power systems, with grid-forming (GFM) inverters playing a central role. Effective fault current limiting is a major challenge to modernizing power systems through increased penetration of GFM inverters. Due to their voltage-source nature, GFM inverters offer no direct control over the output current and, therefore, are susceptible to high fault currents. This vulnerability is especially pronounced during large phase jumps, a condition overlooked by most fault current limiting methods. This paper proposes a hybrid fault current limiting method implemented through a virtual admittance by leveraging the advantages of two virtual impedance (VI)-based methods tailored for three-phase faults and phase jump disturbances. Electromagnetic transient simulations conducted in MATLAB-Simulink demonstrate the method's effectiveness across various disturbances, validating its potential in single-loop GFM structures. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2505_10744 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | A Virtual Admittance-Based Fault Current Limiting Method for Grid-Forming Inverters Mahmood, Zaid Ibn Cui, Hantao Zhang, Ying Systems and Control Inverter-based resources (IBRs) are a key component in the ongoing modernization of power systems, with grid-forming (GFM) inverters playing a central role. Effective fault current limiting is a major challenge to modernizing power systems through increased penetration of GFM inverters. Due to their voltage-source nature, GFM inverters offer no direct control over the output current and, therefore, are susceptible to high fault currents. This vulnerability is especially pronounced during large phase jumps, a condition overlooked by most fault current limiting methods. This paper proposes a hybrid fault current limiting method implemented through a virtual admittance by leveraging the advantages of two virtual impedance (VI)-based methods tailored for three-phase faults and phase jump disturbances. Electromagnetic transient simulations conducted in MATLAB-Simulink demonstrate the method's effectiveness across various disturbances, validating its potential in single-loop GFM structures. |
| title | A Virtual Admittance-Based Fault Current Limiting Method for Grid-Forming Inverters |
| topic | Systems and Control |
| url | https://arxiv.org/abs/2505.10744 |