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Main Authors: Cheng, Feng, Zhang, Tunhou, Zhang, Junyao, Ku, Jonathan Hao-Cheng, Wang, Yitu, Yang, Xiaoxuan, Hai, Li, Chen, Yiran
Format: Preprint
Published: 2025
Subjects:
Online Access:https://arxiv.org/abs/2505.10748
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author Cheng, Feng
Zhang, Tunhou
Zhang, Junyao
Ku, Jonathan Hao-Cheng
Wang, Yitu
Yang, Xiaoxuan
Hai
Li
Chen, Yiran
author_facet Cheng, Feng
Zhang, Tunhou
Zhang, Junyao
Ku, Jonathan Hao-Cheng
Wang, Yitu
Yang, Xiaoxuan
Hai
Li
Chen, Yiran
contents The performance bottleneck of deep-learning-based recommender systems resides in their backbone Deep Neural Networks. By integrating Processing-In-Memory~(PIM) architectures, researchers can reduce data movement and enhance energy efficiency, paving the way for next-generation recommender models. Nevertheless, achieving performance and efficiency gains is challenging due to the complexity of the PIM design space and the intricate mapping of operators. In this paper, we demonstrate that automated PIM design is feasible even within the most demanding recommender model design space, spanning over $10^{54}$ possible architectures. We propose \methodname, which formulates the co-optimization of recommender models and PIM design as a combinatorial search over mixed-precision interaction operations, and parameterizes the search with a one-shot supernet encompassing all mixed-precision options. We comprehensively evaluate our approach on three Click-Through Rate benchmarks, showcasing the superiority of our automated design methodology over manual approaches. Our results indicate up to a 3.36$\times$ speedup, 1.68$\times$ area reduction, and 12.48$\times$ higher power efficiency compared to naively mapped searched designs and state-of-the-art handcrafted designs.
format Preprint
id arxiv_https___arxiv_org_abs_2505_10748
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle AutoRAC: Automated Processing-in-Memory Accelerator Design for Recommender Systems
Cheng, Feng
Zhang, Tunhou
Zhang, Junyao
Ku, Jonathan Hao-Cheng
Wang, Yitu
Yang, Xiaoxuan
Hai
Li
Chen, Yiran
Hardware Architecture
The performance bottleneck of deep-learning-based recommender systems resides in their backbone Deep Neural Networks. By integrating Processing-In-Memory~(PIM) architectures, researchers can reduce data movement and enhance energy efficiency, paving the way for next-generation recommender models. Nevertheless, achieving performance and efficiency gains is challenging due to the complexity of the PIM design space and the intricate mapping of operators. In this paper, we demonstrate that automated PIM design is feasible even within the most demanding recommender model design space, spanning over $10^{54}$ possible architectures. We propose \methodname, which formulates the co-optimization of recommender models and PIM design as a combinatorial search over mixed-precision interaction operations, and parameterizes the search with a one-shot supernet encompassing all mixed-precision options. We comprehensively evaluate our approach on three Click-Through Rate benchmarks, showcasing the superiority of our automated design methodology over manual approaches. Our results indicate up to a 3.36$\times$ speedup, 1.68$\times$ area reduction, and 12.48$\times$ higher power efficiency compared to naively mapped searched designs and state-of-the-art handcrafted designs.
title AutoRAC: Automated Processing-in-Memory Accelerator Design for Recommender Systems
topic Hardware Architecture
url https://arxiv.org/abs/2505.10748