GLOVA: Global and Local Variation-Aware Analog Circuit Design with Risk-Sensitive Reinforcement Learning

Fuente: arXiv
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Main Authors: Kim, Dongjun, Park, Junwoo, Shin, Chaehyeon, Jung, Jaeheon, Shin, Kyungho, Baek, Seungheon, Heo, Sanghyuk, Kim, Woongrae, Jeong, Inchul, Cho, Joohwan, Park, Jongsun
Format: Preprint
Published: 2025
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_version_ 1866915289929613312
author Kim, Dongjun
Park, Junwoo
Shin, Chaehyeon
Jung, Jaeheon
Shin, Kyungho
Baek, Seungheon
Heo, Sanghyuk
Kim, Woongrae
Jeong, Inchul
Cho, Joohwan
Park, Jongsun
author_facet Kim, Dongjun
Park, Junwoo
Shin, Chaehyeon
Jung, Jaeheon
Shin, Kyungho
Baek, Seungheon
Heo, Sanghyuk
Kim, Woongrae
Jeong, Inchul
Cho, Joohwan
Park, Jongsun
contents Analog/mixed-signal circuit design encounters significant challenges due to performance degradation from process, voltage, and temperature (PVT) variations. To achieve commercial-grade reliability, iterative manual design revisions and extensive statistical simulations are required. While several studies have aimed to automate variation aware analog design to reduce time-to-market, the substantial mismatches in real-world wafers have not been thoroughly addressed. In this paper, we present GLOVA, an analog circuit sizing framework that effectively manages the impact of diverse random mismatches to improve robustness against PVT variations. In the proposed approach, risk-sensitive reinforcement learning is leveraged to account for the reliability bound affected by PVT variations, and ensemble-based critic is introduced to achieve sample-efficient learning. For design verification, we also propose $μ$-$σ$ evaluation and simulation reordering method to reduce simulation costs of identifying failed designs. GLOVA supports verification through industrial-level PVT variation evaluation methods, including corner simulation as well as global and local Monte Carlo (MC) simulations. Compared to previous state-of-the-art variation-aware analog sizing frameworks, GLOVA achieves up to 80.5$\times$ improvement in sample efficiency and 76.0$\times$ reduction in time.
format Preprint
id arxiv_https___arxiv_org_abs_2505_11208
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle GLOVA: Global and Local Variation-Aware Analog Circuit Design with Risk-Sensitive Reinforcement Learning
Kim, Dongjun
Park, Junwoo
Shin, Chaehyeon
Jung, Jaeheon
Shin, Kyungho
Baek, Seungheon
Heo, Sanghyuk
Kim, Woongrae
Jeong, Inchul
Cho, Joohwan
Park, Jongsun
Artificial Intelligence
Computational Engineering, Finance, and Science
Emerging Technologies
Machine Learning
Analog/mixed-signal circuit design encounters significant challenges due to performance degradation from process, voltage, and temperature (PVT) variations. To achieve commercial-grade reliability, iterative manual design revisions and extensive statistical simulations are required. While several studies have aimed to automate variation aware analog design to reduce time-to-market, the substantial mismatches in real-world wafers have not been thoroughly addressed. In this paper, we present GLOVA, an analog circuit sizing framework that effectively manages the impact of diverse random mismatches to improve robustness against PVT variations. In the proposed approach, risk-sensitive reinforcement learning is leveraged to account for the reliability bound affected by PVT variations, and ensemble-based critic is introduced to achieve sample-efficient learning. For design verification, we also propose $μ$-$σ$ evaluation and simulation reordering method to reduce simulation costs of identifying failed designs. GLOVA supports verification through industrial-level PVT variation evaluation methods, including corner simulation as well as global and local Monte Carlo (MC) simulations. Compared to previous state-of-the-art variation-aware analog sizing frameworks, GLOVA achieves up to 80.5$\times$ improvement in sample efficiency and 76.0$\times$ reduction in time.
title GLOVA: Global and Local Variation-Aware Analog Circuit Design with Risk-Sensitive Reinforcement Learning
topic Artificial Intelligence
Computational Engineering, Finance, and Science
Emerging Technologies
Machine Learning
url https://arxiv.org/abs/2505.11208