Cover Image

SpikeX: Exploring Accelerator Architecture and Network-Hardware Co-Optimization for Sparse Spiking Neural Networks

Fuente: arXiv

Saved in:

Bibliographic Details
Main Authors:	Xu, Boxun, Boone, Richard, Li, Peng
Format:	Preprint
Published:	2025
Subjects:	Neural and Evolutionary Computing Artificial Intelligence Hardware Architecture
Online Access:	Acceder al recurso
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

Spiking Transformer Hardware Accelerators in 3D Integration
by: Xu, Boxun, et al.
Published: (2024)

Towards 3D Acceleration for low-power Mixture-of-Experts and Multi-Head Attention Spiking Transformers
by: Xu, Boxun, et al.
Published: (2024)

SRAM-Based Compute-in-Memory Accelerator for Linear-decay Spiking Neural Networks
by: Shang, Hongyang, et al.
Published: (2026)

LoAS: Fully Temporal-Parallel Dataflow for Dual-Sparse Spiking Neural Networks
by: Yin, Ruokai, et al.
Published: (2024)

To Spike or Not To Spike: A Digital Hardware Perspective on Deep Learning Acceleration
by: Ottati, Fabrizio, et al.
Published: (2023)

UniSpike: Accelerating Spiking Neural Networks on Neuromorphic Systems via Eliminating Address Redundancy
by: Xing, Qinghui, et al.
Published: (2026)

Full Feature Spiking Neural Network Simulation on Micro-Controllers for Neuromorphic Applications at the Edge
by: Niedermeier, L., et al.
Published: (2026)

FeNN: A RISC-V vector processor for Spiking Neural Network acceleration
by: Aizaz, Zainab, et al.
Published: (2025)

Spiker+: a framework for the generation of efficient Spiking Neural Networks FPGA accelerators for inference at the edge
by: Carpegna, Alessio, et al.
Published: (2024)

Efficient Implementation of a Multi-Layer Gradient-Free Online-Trainable Spiking Neural Network on FPGA
by: Mehrabi, Ali, et al.
Published: (2023)

TrIM, Triangular Input Movement Systolic Array for Convolutional Neural Networks: Architecture and Hardware Implementation
by: Sestito, Cristian, et al.
Published: (2024)

Stochastic Spiking Attention: Accelerating Attention with Stochastic Computing in Spiking Networks
by: Song, Zihang, et al.
Published: (2024)

When In-memory Computing Meets Spiking Neural Networks -- A Perspective on Device-Circuit-System-and-Algorithm Co-design
by: Moitra, Abhishek, et al.
Published: (2024)

NeuroNAS: Enhancing Efficiency of Neuromorphic In-Memory Computing for Intelligent Mobile Agents through Hardware-Aware Spiking Neural Architecture Search
by: Putra, Rachmad Vidya Wicaksana, et al.
Published: (2024)

Analysis of a Memcapacitor-Based for Neural Network Accelerator Framework
by: Singh, Ankur, et al.
Published: (2025)

SNAP-V: A RISC-V SoC with Configurable Neuromorphic Acceleration for Small-Scale Spiking Neural Networks
by: Gunawardana, Kanishka, et al.
Published: (2026)

STEMS: Spatial-Temporal Mapping For Spiking Neural Networks
by: Eissa, Sherif, et al.
Published: (2025)

Core Placement Optimization of Many-core Brain-Inspired Near-Storage Systems for Spiking Neural Network Training
by: Zhu, Xueke, et al.
Published: (2024)

Fast Algorithms for Spiking Neural Network Simulation with FPGAs
by: Lindqvist, Björn A., et al.
Published: (2024)

Hybrid Synaptic Structure for Spiking Neural Network Realization
by: Razmkhah, Sasan, et al.
Published: (2023)

Spiking Manifesto
by: Izhikevich, Eugene
Published: (2025)

Ultra-Low-Power Spiking Neurons in 7 nm FinFET Technology: A Comparative Analysis of Leaky Integrate-and-Fire, Morris-Lecar, and Axon-Hillock Architectures
by: Larsh, Logan, et al.
Published: (2025)

Enabling Efficient Processing of Spiking Neural Networks with On-Chip Learning on Commodity Neuromorphic Processors for Edge AI Systems
by: Putra, Rachmad Vidya Wicaksana, et al.
Published: (2025)

E2ATST: A Temporal-Spatial Optimized Energy-Efficient Architecture for Training Spiking Transformer
by: Ma, Yunhao, et al.
Published: (2025)

Hardware-Friendly Implementation of Physical Reservoir Computing with CMOS-based Time-domain Analog Spiking Neurons
by: Kimura, Nanako, et al.
Published: (2024)

SpiDR: A Reconfigurable Digital Compute-in-Memory Spiking Neural Network Accelerator for Event-based Perception
by: Sharma, Deepika, et al.
Published: (2024)

Energy-Aware FPGA Implementation of Spiking Neural Network with LIF Neurons
by: Ali, Asmer Hamid, et al.
Published: (2024)

What Is Next for LLMs? Next-Generation AI Computing Hardware Using Photonic Chips
by: Li, Renjie, et al.
Published: (2025)

Joint Hardware-Workload Co-Optimization for In-Memory Computing Accelerators
by: Krestinskaya, Olga, et al.
Published: (2026)

HENNC: Hardware Engine for Artificial Neural Network-based Chaotic Oscillators
by: Vaziri, Mobin, et al.
Published: (2024)

You Only Spike Once: Improving Energy-Efficient Neuromorphic Inference to ANN-Level Accuracy
by: P, Srivatsa, et al.
Published: (2020)

Neuroevolving Electronic Dynamical Networks
by: Whitley, Derek
Published: (2024)

Functional Stability of Software-Hardware Neural Network Implementation The NeuroComp Project
by: Oleksii, Bychkov, et al.
Published: (2025)

Hardware-Aware Model Design and Training of Silicon-based Analog Neural Networks
by: Filippeschi, Giulio, et al.
Published: (2025)

IzhiRISC-V -- a RISC-V-based Processor with Custom ISA Extension for Spiking Neuron Networks Processing with Izhikevich Neurons
by: Szczerek, Wiktor J., et al.
Published: (2025)

Quantized Context Based LIF Neurons for Recurrent Spiking Neural Networks in 45nm
by: Bezugam, Sai Sukruth, et al.
Published: (2024)

A Deep Neural Network Deployment Based on Resistive Memory Accelerator Simulation
by: Maram, Tejaswanth Reddy, et al.
Published: (2023)

A Reconfigurable Stream-Based FPGA Accelerator for Bayesian Confidence Propagation Neural Networks
by: Hafiz, Muhammad Ihsan Al, et al.
Published: (2025)

A 0.5-V Linear Neuromorphic Voltage-to-Spike Encoder Using a Bulk-Driven Transconductor
by: Akbari, Meysam, et al.
Published: (2026)

NeuroRing: Scaling Spiking Neural Networks via Multi-FPGA Bidirectional Ring Topologies and Stream-Dataflow Architectures
by: Hafiz, Muhammad Ihsan Al, et al.
Published: (2026)