FPGA-based Acceleration for Convolutional Neural Networks: A Comprehensive Review

Fuente: arXiv

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Bibliographic Details
Main Authors:	Jiang, Junye, Zhou, Yaan, Gong, Yuanhao, Yuan, Haoxuan, Liu, Shuanglong
Format:	Preprint
Published:	2025
Subjects:	Machine Learning Hardware Architecture C.3
Online Access:	Acceder al recurso
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Internet

https://arxiv.org/abs/2505.13461