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FPGA-based Acceleration for Convolutional Neural Networks: A Comprehensive Review

Fuente: arXiv

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Detalles Bibliográficos
Autores principales:	Jiang, Junye, Zhou, Yaan, Gong, Yuanhao, Yuan, Haoxuan, Liu, Shuanglong
Formato:	Preprint
Publicado:	2025
Materias:	Machine Learning Hardware Architecture C.3
Acceso en línea:	Acceder al recurso
Etiquetas:	Agregar Etiqueta Sin Etiquetas, Sea el primero en etiquetar este registro!

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