Copertina

Chameleon: A MatMul-Free Temporal Convolutional Network Accelerator for End-to-End Few-Shot and Continual Learning from Sequential Data

Fuente: arXiv

Salvato in:

Dettagli Bibliografici
Autori principali:	Blanken, Douwe den, Frenkel, Charlotte
Natura:	Preprint
Pubblicazione:	2025
Soggetti:	Hardware Architecture Machine Learning C.3; B.6.0; B.7.0; I.2.6; B.5.0
Accesso online:	Acceder al recurso
Tags:	Aggiungi Tag Nessun Tag, puoi essere il primo ad aggiungerne!!

Documenti analoghi

An Event-Based Digital Compute-In-Memory Accelerator with Flexible Operand Resolution and Layer-Wise Weight/Output Stationarity
di: Chauvaux, Nicolas, et al.
Pubblicazione: (2024)

Re-thinking Memory-Bound Limitations in CGRAs
di: Liu, Xiangfeng, et al.
Pubblicazione: (2025)

MANTIS: A Mixed-Signal Near-Sensor Convolutional Imager SoC Using Charge-Domain 4b-Weighted 5-to-84-TOPS/W MAC Operations for Feature Extraction and Region-of-Interest Detection
di: Lefebvre, Martin, et al.
Pubblicazione: (2024)

A 2.5-nA Area-Efficient Temperature-Independent 176-/82-ppm/°C CMOS-Only Current Reference in 0.11-$μ$m Bulk and 22-nm FD-SOI
di: Lefebvre, Martin, et al.
Pubblicazione: (2024)

A nA-Range Area-Efficient Sub-100-ppm/°C Peaking Current Reference Using Forward Body Biasing in 0.11-$μ$m Bulk and 22-nm FD-SOI
di: Lefebvre, Martin, et al.
Pubblicazione: (2024)

A 1.1- / 0.9-nA Temperature-Independent 213- / 565-ppm/$^\circ$C Self-Biased CMOS-Only Current Reference in 65-nm Bulk and 22-nm FDSOI
di: Lefebvre, Martin, et al.
Pubblicazione: (2023)

Hourglass Sorting: A novel parallel sorting algorithm and its implementation
di: Bascones, Daniel, et al.
Pubblicazione: (2025)

Resource Optimized Quantum Squaring Circuit
di: Sultana, Afrin, et al.
Pubblicazione: (2024)

HeTraX: Energy Efficient 3D Heterogeneous Manycore Architecture for Transformer Acceleration
di: Dhingra, Pratyush, et al.
Pubblicazione: (2024)

SPICEMixer - Netlist-Level Circuit Evolution
di: Uhlich, Stefan, et al.
Pubblicazione: (2025)

CXL-ClusterSim: Modeling CXL-based Disaggregated Memory Cluster for Pooling and Sharing using gem5 and SST
di: Goswami, Kaustav, et al.
Pubblicazione: (2026)

parti-gem5: gem5's Timing Mode Parallelised
di: Cubero-Cascante, José, et al.
Pubblicazione: (2023)

Pre-Sorted Tsetlin Machine (The Genetic K-Medoid Method)
di: Morris, Jordan
Pubblicazione: (2024)

Accelerating Recommendation System Training by Leveraging Popular Choices
di: Adnan, Muhammad, et al.
Pubblicazione: (2021)

PG-MDP: Profile-Guided Memory Dependence Prediction for Area-Constrained Cores
di: Panayi, Luke, et al.
Pubblicazione: (2026)

Improving Memory Dependence Prediction with Static Analysis
di: Panayi, Luke, et al.
Pubblicazione: (2024)

Silent Data Corruption by 10x Test Escapes Threatens Reliable Computing
di: Mitra, Subhasish, et al.
Pubblicazione: (2025)

basic_RV32s: An Open-Source Microarchitectural Roadmap for RISC-V RV32I
di: Kang, Hyun Woo, et al.
Pubblicazione: (2025)

Streamlining SIMD ISA Extensions with Takum Arithmetic: A Case Study on Intel AVX10.2
di: Hunhold, Laslo
Pubblicazione: (2025)

Integer Representations in IEEE 754, Posit, and Takum Arithmetics
di: Hunhold, Laslo
Pubblicazione: (2024)

SoK: Where's the "up"?! A Comprehensive (bottom-up) Study on the Security of Arm Cortex-M Systems
di: Tan, Xi, et al.
Pubblicazione: (2024)

Machine-Learning-Powered Neural Interfaces for Smart Prosthetics and Diagnostics
di: Shaeri, MohammadAli, et al.
Pubblicazione: (2025)

Pinching Tactile Display: A Cloth that Changes Tactile Sensation by Electrostatic Adsorption
di: Kitagishi, Takekazu, et al.
Pubblicazione: (2024)

RV-IM100: Quantifying ISA Extension, Datapath Width, and Pipeline Depth Trade-offs in RISC-V Microarchitectures
di: Kang, Hyunwoo
Pubblicazione: (2026)

Extraction of Secrets from 40nm CMOS Gate Dielectric Breakdown Antifuses by FIB Passive Voltage Contrast
di: Zonenberg, Andrew D., et al.
Pubblicazione: (2025)

Veryl: A New Hardware Description Language as an Altarnative to SystemVerilog
di: Hatta, Naoya, et al.
Pubblicazione: (2024)

Comprehensive Formal Verification of Observational Correctness for the CHERIoT-Ibex Processor
di: Ploix, Louis-Emile, et al.
Pubblicazione: (2025)

Minimal Neuron Circuits -- Part I: Resonators
di: Nabil, Amr, et al.
Pubblicazione: (2025)

Minimal Neuron Circuits: Bursters
di: Nabil, Amr, et al.
Pubblicazione: (2025)

ALL-MASK: A Reconfigurable Logic Locking Method for Multicore Architecture with Sequential-Instruction-Oriented Key
di: Wang, Jianfeng, et al.
Pubblicazione: (2022)

FREESS: A Web-Based Educational Simulator for a RISC-V-Inspired Superscalar Processor with Tomasulo-Style Dynamic Scheduling
di: Giorgi, Roberto, et al.
Pubblicazione: (2026)

Finite-Time Lyapunov Exponent Calculation on FPGA using High-Level Synthesis Tools
di: de Castro, Manuel, et al.
Pubblicazione: (2024)

RayFlex: An Open-Source RTL Implementation of the Hardware Ray Tracer Datapath
di: Shen, Fangjia, et al.
Pubblicazione: (2024)

LUT Tensor Core: A Software-Hardware Co-Design for LUT-Based Low-Bit LLM Inference
di: Mo, Zhiwen, et al.
Pubblicazione: (2024)

Assessing Tenstorrent's RISC-V MatMul Acceleration Capabilities
di: Cavagna, Hiari Pizzini, et al.
Pubblicazione: (2025)

Data Gravity and the Energy Limits of Computation
di: Lee, Wonsuk, et al.
Pubblicazione: (2026)

Regularity properties of the $α$-Wilton functions
di: Bakhtawar, Ayreena, et al.
Pubblicazione: (2024)

Transaction Level Hierarchy Guided and Functional Coverage Driven Deductive Formal Verification
di: Strauch, Tobias
Pubblicazione: (2025)

An SMT Formalization of Mixed-Precision Matrix Multiplication: Modeling Three Generations of Tensor Cores
di: Valpey, Benjamin, et al.
Pubblicazione: (2025)

Mestra: Exploring Migration on Virtualized CGRAs
di: Kyriazis, Agamemnon, et al.
Pubblicazione: (2026)