SALAD: Systematic Assessment of Machine Unlearning on LLM-Aided Hardware Design

Fuente: arXiv
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Hauptverfasser: Wang, Zeng, Shao, Minghao, Karn, Rupesh, Mankali, Likhitha, Bhandari, Jitendra, Karri, Ramesh, Sinanoglu, Ozgur, Shafique, Muhammad, Knechtel, Johann
Format: Preprint
Veröffentlicht: 2025
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author Wang, Zeng
Shao, Minghao
Karn, Rupesh
Mankali, Likhitha
Bhandari, Jitendra
Karri, Ramesh
Sinanoglu, Ozgur
Shafique, Muhammad
Knechtel, Johann
author_facet Wang, Zeng
Shao, Minghao
Karn, Rupesh
Mankali, Likhitha
Bhandari, Jitendra
Karri, Ramesh
Sinanoglu, Ozgur
Shafique, Muhammad
Knechtel, Johann
contents Large Language Models (LLMs) offer transformative capabilities for hardware design automation, particularly in Verilog code generation. However, they also pose significant data security challenges, including Verilog evaluation data contamination, intellectual property (IP) design leakage, and the risk of malicious Verilog generation. We introduce SALAD, a comprehensive assessment that leverages machine unlearning to mitigate these threats. Our approach enables the selective removal of contaminated benchmarks, sensitive IP and design artifacts, or malicious code patterns from pre-trained LLMs, all without requiring full retraining. Through detailed case studies, we demonstrate how machine unlearning techniques effectively reduce data security risks in LLM-aided hardware design.
format Preprint
id arxiv_https___arxiv_org_abs_2506_02089
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle SALAD: Systematic Assessment of Machine Unlearning on LLM-Aided Hardware Design
Wang, Zeng
Shao, Minghao
Karn, Rupesh
Mankali, Likhitha
Bhandari, Jitendra
Karri, Ramesh
Sinanoglu, Ozgur
Shafique, Muhammad
Knechtel, Johann
Machine Learning
Artificial Intelligence
Cryptography and Security
Large Language Models (LLMs) offer transformative capabilities for hardware design automation, particularly in Verilog code generation. However, they also pose significant data security challenges, including Verilog evaluation data contamination, intellectual property (IP) design leakage, and the risk of malicious Verilog generation. We introduce SALAD, a comprehensive assessment that leverages machine unlearning to mitigate these threats. Our approach enables the selective removal of contaminated benchmarks, sensitive IP and design artifacts, or malicious code patterns from pre-trained LLMs, all without requiring full retraining. Through detailed case studies, we demonstrate how machine unlearning techniques effectively reduce data security risks in LLM-aided hardware design.
title SALAD: Systematic Assessment of Machine Unlearning on LLM-Aided Hardware Design
topic Machine Learning
Artificial Intelligence
Cryptography and Security
url https://arxiv.org/abs/2506.02089