Large Processor Chip Model
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arXiv
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| Autori principali: | , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2025
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| _version_ | 1866909635075637248 |
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| author | Chang, Kaiyan Chen, Mingzhi Chen, Yunji Chen, Zhirong Fan, Dongrui Gong, Junfeng Guo, Nan Han, Yinhe Hao, Qinfen Hou, Shuo Huang, Xuan Jin, Pengwei Ke, Changxin Li, Cangyuan Li, Guangli Li, Huawei Li, Kuan Li, Naipeng Liang, Shengwen Liu, Cheng Liu, Hongwei Liu, Jiahua Lv, Junliang Mu, Jianan Qin, Jin Sun, Bin Wang, Chenxi Wang, Duo Wang, Mingjun Wang, Ying Wu, Chenggang Wu, Peiyang Wu, Teng Xiao, Xiao Xie, Mengyao Xiong, Chenwei Xu, Ruiyuan Yan, Mingyu Ye, Xiaochun Yu, Kuai Zhang, Rui Zhang, Shuoming Zhao, Jiacheng |
| author_facet | Chang, Kaiyan Chen, Mingzhi Chen, Yunji Chen, Zhirong Fan, Dongrui Gong, Junfeng Guo, Nan Han, Yinhe Hao, Qinfen Hou, Shuo Huang, Xuan Jin, Pengwei Ke, Changxin Li, Cangyuan Li, Guangli Li, Huawei Li, Kuan Li, Naipeng Liang, Shengwen Liu, Cheng Liu, Hongwei Liu, Jiahua Lv, Junliang Mu, Jianan Qin, Jin Sun, Bin Wang, Chenxi Wang, Duo Wang, Mingjun Wang, Ying Wu, Chenggang Wu, Peiyang Wu, Teng Xiao, Xiao Xie, Mengyao Xiong, Chenwei Xu, Ruiyuan Yan, Mingyu Ye, Xiaochun Yu, Kuai Zhang, Rui Zhang, Shuoming Zhao, Jiacheng |
| contents | Computer System Architecture serves as a crucial bridge between software applications and the underlying hardware, encompassing components like compilers, CPUs, coprocessors, and RTL designs. Its development, from early mainframes to modern domain-specific architectures, has been driven by rising computational demands and advancements in semiconductor technology. However, traditional paradigms in computer system architecture design are confronting significant challenges, including a reliance on manual expertise, fragmented optimization across software and hardware layers, and high costs associated with exploring expansive design spaces. While automated methods leveraging optimization algorithms and machine learning have improved efficiency, they remain constrained by a single-stage focus, limited data availability, and a lack of comprehensive human domain knowledge. The emergence of large language models offers transformative opportunities for the design of computer system architecture. By leveraging the capabilities of LLMs in areas such as code generation, data analysis, and performance modeling, the traditional manual design process can be transitioned to a machine-based automated design approach. To harness this potential, we present the Large Processor Chip Model (LPCM), an LLM-driven framework aimed at achieving end-to-end automated computer architecture design. The LPCM is structured into three levels: Human-Centric; Agent-Orchestrated; and Model-Governed. This paper utilizes 3D Gaussian Splatting as a representative workload and employs the concept of software-hardware collaborative design to examine the implementation of the LPCM at Level 1, demonstrating the effectiveness of the proposed approach. Furthermore, this paper provides an in-depth discussion on the pathway to implementing Level 2 and Level 3 of the LPCM, along with an analysis of the existing challenges. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2506_02929 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Large Processor Chip Model Chang, Kaiyan Chen, Mingzhi Chen, Yunji Chen, Zhirong Fan, Dongrui Gong, Junfeng Guo, Nan Han, Yinhe Hao, Qinfen Hou, Shuo Huang, Xuan Jin, Pengwei Ke, Changxin Li, Cangyuan Li, Guangli Li, Huawei Li, Kuan Li, Naipeng Liang, Shengwen Liu, Cheng Liu, Hongwei Liu, Jiahua Lv, Junliang Mu, Jianan Qin, Jin Sun, Bin Wang, Chenxi Wang, Duo Wang, Mingjun Wang, Ying Wu, Chenggang Wu, Peiyang Wu, Teng Xiao, Xiao Xie, Mengyao Xiong, Chenwei Xu, Ruiyuan Yan, Mingyu Ye, Xiaochun Yu, Kuai Zhang, Rui Zhang, Shuoming Zhao, Jiacheng Hardware Architecture Computer System Architecture serves as a crucial bridge between software applications and the underlying hardware, encompassing components like compilers, CPUs, coprocessors, and RTL designs. Its development, from early mainframes to modern domain-specific architectures, has been driven by rising computational demands and advancements in semiconductor technology. However, traditional paradigms in computer system architecture design are confronting significant challenges, including a reliance on manual expertise, fragmented optimization across software and hardware layers, and high costs associated with exploring expansive design spaces. While automated methods leveraging optimization algorithms and machine learning have improved efficiency, they remain constrained by a single-stage focus, limited data availability, and a lack of comprehensive human domain knowledge. The emergence of large language models offers transformative opportunities for the design of computer system architecture. By leveraging the capabilities of LLMs in areas such as code generation, data analysis, and performance modeling, the traditional manual design process can be transitioned to a machine-based automated design approach. To harness this potential, we present the Large Processor Chip Model (LPCM), an LLM-driven framework aimed at achieving end-to-end automated computer architecture design. The LPCM is structured into three levels: Human-Centric; Agent-Orchestrated; and Model-Governed. This paper utilizes 3D Gaussian Splatting as a representative workload and employs the concept of software-hardware collaborative design to examine the implementation of the LPCM at Level 1, demonstrating the effectiveness of the proposed approach. Furthermore, this paper provides an in-depth discussion on the pathway to implementing Level 2 and Level 3 of the LPCM, along with an analysis of the existing challenges. |
| title | Large Processor Chip Model |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2506.02929 |