Bi, J., Yang, S., Chen, S., & Zhang, P. (2025). High-Speed Ultra-Energy-Efficient Memristor-Based Massive MIMO SIC Detector Circuit with Hybrid Analog-Digital Computing Architecture.
Chicago Style (17th ed.) CitationBi, Jia-Hui, Shaoshi Yang, Sheng Chen, and Ping Zhang. High-Speed Ultra-Energy-Efficient Memristor-Based Massive MIMO SIC Detector Circuit with Hybrid Analog-Digital Computing Architecture. 2025.
MLA (9th ed.) CitationBi, Jia-Hui, et al. High-Speed Ultra-Energy-Efficient Memristor-Based Massive MIMO SIC Detector Circuit with Hybrid Analog-Digital Computing Architecture. 2025.
Warning: These citations may not always be 100% accurate.