Depth-Optimal Quantum Layout Synthesis as SAT

Fuente: arXiv
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Autores principales: Jakobsen, Anna B., Clausen, Anders B., van de Pol, Jaco, Shaik, Irfansha
Formato: Preprint
Publicado: 2025
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author Jakobsen, Anna B.
Clausen, Anders B.
van de Pol, Jaco
Shaik, Irfansha
author_facet Jakobsen, Anna B.
Clausen, Anders B.
van de Pol, Jaco
Shaik, Irfansha
contents Quantum circuits consist of gates applied to qubits. Current quantum hardware platforms impose connectivity restrictions on binary CX gates. Hence, Layout Synthesis is an important step to transpile quantum circuits before they can be executed. Since CX gates are noisy, it is important to reduce the CX count or CX depth of the mapped circuits. We provide a new and efficient encoding of Quantum-circuit Layout Synthesis in SAT. Previous SAT encodings focused on gate count and CX-gate count. Our encoding instead guarantees that we find mapped circuits with minimal circuit depth or minimal CX-gate depth. We use incremental SAT solving and parallel plans for an efficient encoding. This results in speedups of more than 10-100x compared to OLSQ2, which guarantees depth-optimality. But minimizing depth still takes more time than minimizing gate count with Q-Synth. We correlate the noise reduction achieved by simulating circuits after (CX)-count and (CX)-depth reduction. We find that minimizing for CX-count correlates better with reducing noise than minimizing for CX-depth. However, taking into account both CX-count and CX-depth provides the best noise reduction.
format Preprint
id arxiv_https___arxiv_org_abs_2506_06752
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Depth-Optimal Quantum Layout Synthesis as SAT
Jakobsen, Anna B.
Clausen, Anders B.
van de Pol, Jaco
Shaik, Irfansha
Quantum Physics
Artificial Intelligence
Quantum circuits consist of gates applied to qubits. Current quantum hardware platforms impose connectivity restrictions on binary CX gates. Hence, Layout Synthesis is an important step to transpile quantum circuits before they can be executed. Since CX gates are noisy, it is important to reduce the CX count or CX depth of the mapped circuits. We provide a new and efficient encoding of Quantum-circuit Layout Synthesis in SAT. Previous SAT encodings focused on gate count and CX-gate count. Our encoding instead guarantees that we find mapped circuits with minimal circuit depth or minimal CX-gate depth. We use incremental SAT solving and parallel plans for an efficient encoding. This results in speedups of more than 10-100x compared to OLSQ2, which guarantees depth-optimality. But minimizing depth still takes more time than minimizing gate count with Q-Synth. We correlate the noise reduction achieved by simulating circuits after (CX)-count and (CX)-depth reduction. We find that minimizing for CX-count correlates better with reducing noise than minimizing for CX-depth. However, taking into account both CX-count and CX-depth provides the best noise reduction.
title Depth-Optimal Quantum Layout Synthesis as SAT
topic Quantum Physics
Artificial Intelligence
url https://arxiv.org/abs/2506.06752