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Bibliographic Details
Main Authors: Kawasaki, Hidemasa, Akiyama, Soramichi
Format: Preprint
Published: 2025
Subjects:
Online Access:https://arxiv.org/abs/2506.07190
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author Kawasaki, Hidemasa
Akiyama, Soramichi
author_facet Kawasaki, Hidemasa
Akiyama, Soramichi
contents Inter-VM RowHammer is an attack that induces a bitflip beyond the boundaries of virtual machines (VMs) to compromise a VM from another, and some software-based techniques have been proposed to mitigate this attack. Evaluating these mitigation techniques requires to confirm that they actually mitigate inter-VM RowHammer in low overhead. A challenge in this evaluation process is that both the mitigation ability and the overhead depend on the underlying hardware whose DRAM address mappings are different from machine to machine. This makes comprehensive evaluation prohibitively costly or even implausible as no machine that has a specific DRAM address mapping might be available. To tackle this challenge, we propose a simulation-based framework to evaluate software-based inter-VM RowHammer mitigation techniques across configurable DRAM address mappings. We demonstrate how to reproduce existing mitigation techniques on our framework, and show that it can evaluate the mitigation abilities and performance overhead of them with configurable DRAM address mappings.
format Preprint
id arxiv_https___arxiv_org_abs_2506_07190
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle A Simulation-based Evaluation Framework for Inter-VM RowHammer Mitigation Techniques
Kawasaki, Hidemasa
Akiyama, Soramichi
Cryptography and Security
Inter-VM RowHammer is an attack that induces a bitflip beyond the boundaries of virtual machines (VMs) to compromise a VM from another, and some software-based techniques have been proposed to mitigate this attack. Evaluating these mitigation techniques requires to confirm that they actually mitigate inter-VM RowHammer in low overhead. A challenge in this evaluation process is that both the mitigation ability and the overhead depend on the underlying hardware whose DRAM address mappings are different from machine to machine. This makes comprehensive evaluation prohibitively costly or even implausible as no machine that has a specific DRAM address mapping might be available. To tackle this challenge, we propose a simulation-based framework to evaluate software-based inter-VM RowHammer mitigation techniques across configurable DRAM address mappings. We demonstrate how to reproduce existing mitigation techniques on our framework, and show that it can evaluate the mitigation abilities and performance overhead of them with configurable DRAM address mappings.
title A Simulation-based Evaluation Framework for Inter-VM RowHammer Mitigation Techniques
topic Cryptography and Security
url https://arxiv.org/abs/2506.07190