A Survey on LUT-based Deep Neural Networks Implemented in FPGAs
Fuente:
arXiv
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| Autore principale: | |
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| Natura: | Preprint |
| Pubblicazione: |
2025
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| Accesso online: | |
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| _version_ | 1866909642899062784 |
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| author | Guo, Zeyu |
| author_facet | Guo, Zeyu |
| contents | Low-latency, energy-efficient deep neural networks (DNNs) inference are critical for edge applications, where traditional cloud-based deployment suffers from high latency and security risks. Field-Programmable Gate Arrays (FPGAs) offer a compelling solution, balancing reconfigurability, power efficiency, and real-time performance. However, conventional FPGA-based DNNs rely heavily on digital signal processing (DSP) blocks for multiply-accumulate (MAC) operations, limiting scalability.
LUT-based DNNs address this challenge by fully leveraging FPGA lookup tables (LUTs) for computation, improving resource utilization and reducing inference latency. This survey provides a comprehensive review of LUT-based DNN architectures, including their evolution, design methodologies, and performance trade-offs, while outlining promising directions for future research. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2506_07367 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | A Survey on LUT-based Deep Neural Networks Implemented in FPGAs Guo, Zeyu Hardware Architecture Low-latency, energy-efficient deep neural networks (DNNs) inference are critical for edge applications, where traditional cloud-based deployment suffers from high latency and security risks. Field-Programmable Gate Arrays (FPGAs) offer a compelling solution, balancing reconfigurability, power efficiency, and real-time performance. However, conventional FPGA-based DNNs rely heavily on digital signal processing (DSP) blocks for multiply-accumulate (MAC) operations, limiting scalability. LUT-based DNNs address this challenge by fully leveraging FPGA lookup tables (LUTs) for computation, improving resource utilization and reducing inference latency. This survey provides a comprehensive review of LUT-based DNN architectures, including their evolution, design methodologies, and performance trade-offs, while outlining promising directions for future research. |
| title | A Survey on LUT-based Deep Neural Networks Implemented in FPGAs |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2506.07367 |