CoQMoE: Co-Designed Quantization and Computation Orchestration for Mixture-of-Experts Vision Transformer on FPGA
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arXiv
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| Main Authors: | Dong, Jiale, Wu, Hao, Wang, Zihao, Lou, Wenqi, Zheng, Zhendong, Gong, Lei, Wang, Chao, Zhou, Xuehai |
|---|---|
| Format: | Preprint |
| Published: |
2025
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| Subjects: | |
| Online Access: | |
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