STI-SNN: A 0.14 GOPS/W/PE Single-Timestep Inference FPGA-based SNN Accelerator with Algorithm and Hardware Co-Design

Fuente: arXiv

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Bibliographic Details
Main Authors:	Wang, Kainan, Yang, Chengyi, Yu, Chengting, Ang, Yee Sin, Wang, Bo, Wang, Aili
Format:	Preprint
Published:	2025
Subjects:	Hardware Architecture
Online Access:	Acceder al recurso
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Internet

https://arxiv.org/abs/2506.08842