FeNN: A RISC-V vector processor for Spiking Neural Network acceleration

Fuente: arXiv
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Hauptverfasser: Aizaz, Zainab, Knight, James C., Nowotny, Thomas
Format: Preprint
Veröffentlicht: 2025
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author Aizaz, Zainab
Knight, James C.
Nowotny, Thomas
author_facet Aizaz, Zainab
Knight, James C.
Nowotny, Thomas
contents Spiking Neural Networks (SNNs) have the potential to drastically reduce the energy requirements of AI systems. However, mainstream accelerators like GPUs and TPUs are designed for the high arithmetic intensity of standard ANNs so are not well-suited to SNN simulation. FPGAs are well-suited to applications with low arithmetic intensity as they have high off-chip memory bandwidth and large amounts of on-chip memory. Here, we present a novel RISC-V-based soft vector processor (FeNN), tailored to simulating SNNs on FPGAs. Unlike most dedicated neuromorphic hardware, FeNN is fully programmable and designed to be integrated with applications running on standard computers from the edge to the cloud. We demonstrate that, by using stochastic rounding and saturation, FeNN can achieve high numerical precision with low hardware utilisation and that a single FeNN core can simulate an SNN classifier faster than both an embedded GPU and the Loihi neuromorphic system.
format Preprint
id arxiv_https___arxiv_org_abs_2506_11760
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle FeNN: A RISC-V vector processor for Spiking Neural Network acceleration
Aizaz, Zainab
Knight, James C.
Nowotny, Thomas
Neural and Evolutionary Computing
Artificial Intelligence
Hardware Architecture
Spiking Neural Networks (SNNs) have the potential to drastically reduce the energy requirements of AI systems. However, mainstream accelerators like GPUs and TPUs are designed for the high arithmetic intensity of standard ANNs so are not well-suited to SNN simulation. FPGAs are well-suited to applications with low arithmetic intensity as they have high off-chip memory bandwidth and large amounts of on-chip memory. Here, we present a novel RISC-V-based soft vector processor (FeNN), tailored to simulating SNNs on FPGAs. Unlike most dedicated neuromorphic hardware, FeNN is fully programmable and designed to be integrated with applications running on standard computers from the edge to the cloud. We demonstrate that, by using stochastic rounding and saturation, FeNN can achieve high numerical precision with low hardware utilisation and that a single FeNN core can simulate an SNN classifier faster than both an embedded GPU and the Loihi neuromorphic system.
title FeNN: A RISC-V vector processor for Spiking Neural Network acceleration
topic Neural and Evolutionary Computing
Artificial Intelligence
Hardware Architecture
url https://arxiv.org/abs/2506.11760