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| Main Authors: | , , , , |
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| Format: | Preprint |
| Published: |
2025
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| Subjects: | |
| Online Access: | https://arxiv.org/abs/2506.12359 |
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| _version_ | 1866909649097195520 |
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| author | Kumari, Ruby Rout, Tapas Saini, Babul Pandey, Jai Gopal Karmakar, Abhijit |
| author_facet | Kumari, Ruby Rout, Tapas Saini, Babul Pandey, Jai Gopal Karmakar, Abhijit |
| contents | Elliptic Curve Cryptography (ECC) is widely accepted for ensuring secure data exchange between resource-limited IoT devices. The National Institute of Standards and Technology (NIST) recommended implementation, such as B-163, is particularly well-suited for Internet of Things (IoT) applications. Here, Elliptic Curve Point Multiplication (ECPM) is the most time-critical and resource-intensive operation due to the finite field multiplier. This paper proposes a new implementation method of finite field multiplication using a hybrid Karatsuba multiplier, which achieves a significant improvement in computation time while maintaining a reasonable area footprint. The proposed multiplier, along with a finite field adder, squarer, and extended Euclidean inversion circuit, is used to implement an architecture for ECPM using the Montgomery algorithm. The architecture is evaluated for $GF(2^{163})$ on the Xilinx Virtex-7 FPGA platform, achieving a maximum frequency of 213~MHz and occupying 14,195 Lookup Tables (LUTs). The results demonstrate a significant speedup in computation time and overall performance compared to other reported designs. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2506_12359 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | An Efficient Hardware Implementation of Elliptic Curve Point Multiplication over $GF(2^m)$ on FPGA Kumari, Ruby Rout, Tapas Saini, Babul Pandey, Jai Gopal Karmakar, Abhijit Hardware Architecture Elliptic Curve Cryptography (ECC) is widely accepted for ensuring secure data exchange between resource-limited IoT devices. The National Institute of Standards and Technology (NIST) recommended implementation, such as B-163, is particularly well-suited for Internet of Things (IoT) applications. Here, Elliptic Curve Point Multiplication (ECPM) is the most time-critical and resource-intensive operation due to the finite field multiplier. This paper proposes a new implementation method of finite field multiplication using a hybrid Karatsuba multiplier, which achieves a significant improvement in computation time while maintaining a reasonable area footprint. The proposed multiplier, along with a finite field adder, squarer, and extended Euclidean inversion circuit, is used to implement an architecture for ECPM using the Montgomery algorithm. The architecture is evaluated for $GF(2^{163})$ on the Xilinx Virtex-7 FPGA platform, achieving a maximum frequency of 213~MHz and occupying 14,195 Lookup Tables (LUTs). The results demonstrate a significant speedup in computation time and overall performance compared to other reported designs. |
| title | An Efficient Hardware Implementation of Elliptic Curve Point Multiplication over $GF(2^m)$ on FPGA |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2506.12359 |