Towards Employing FPGA and ASIP Acceleration to Enable Onboard AI/ML in Space Applications
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arXiv
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| Main Authors: | , , , , |
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| Format: | Preprint |
| Published: |
2025
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| _version_ | 1866916795012612096 |
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| author | Leon, Vasileios Lentaris, George Soudris, Dimitrios Vellas, Simon Bernou, Mathieu |
| author_facet | Leon, Vasileios Lentaris, George Soudris, Dimitrios Vellas, Simon Bernou, Mathieu |
| contents | The success of AI/ML in terrestrial applications and the commercialization of space are now paving the way for the advent of AI/ML in satellites. However, the limited processing power of classical onboard processors drives the community towards extending the use of FPGAs in space with both rad-hard and Commercial-Off-The-Shelf devices. The increased performance of FPGAs can be complemented with VPU or TPU ASIP co-processors to further facilitate high-level AI development and in-flight reconfiguration. Thus, selecting the most suitable devices and designing the most efficient avionics architecture becomes crucial for the success of novel space missions. The current work presents industrial trends, comparative studies with in-house benchmarking, as well as architectural designs utilizing FPGAs and AI accelerators towards enabling AI/ML in future space missions. |
| format | Preprint |
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arxiv_https___arxiv_org_abs_2506_12970 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Towards Employing FPGA and ASIP Acceleration to Enable Onboard AI/ML in Space Applications Leon, Vasileios Lentaris, George Soudris, Dimitrios Vellas, Simon Bernou, Mathieu Hardware Architecture The success of AI/ML in terrestrial applications and the commercialization of space are now paving the way for the advent of AI/ML in satellites. However, the limited processing power of classical onboard processors drives the community towards extending the use of FPGAs in space with both rad-hard and Commercial-Off-The-Shelf devices. The increased performance of FPGAs can be complemented with VPU or TPU ASIP co-processors to further facilitate high-level AI development and in-flight reconfiguration. Thus, selecting the most suitable devices and designing the most efficient avionics architecture becomes crucial for the success of novel space missions. The current work presents industrial trends, comparative studies with in-house benchmarking, as well as architectural designs utilizing FPGAs and AI accelerators towards enabling AI/ML in future space missions. |
| title | Towards Employing FPGA and ASIP Acceleration to Enable Onboard AI/ML in Space Applications |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2506.12970 |