CXL-GPU: Pushing GPU Memory Boundaries with the Integration of CXL Technologies
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arXiv
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| Main Authors: | , , , , , , , , , , |
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| Format: | Preprint |
| Published: |
2025
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| _version_ | 1866915350200713216 |
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| author | Gouk, Donghyun Kang, Seungkwan Lee, Seungjun Kim, Jiseon Nam, Kyungkuk Ryu, Eojin Lee, Sangwon Kim, Dongpyung Jang, Junhyeok Bae, Hanyeoreum Jung, Myoungsoo |
| author_facet | Gouk, Donghyun Kang, Seungkwan Lee, Seungjun Kim, Jiseon Nam, Kyungkuk Ryu, Eojin Lee, Sangwon Kim, Dongpyung Jang, Junhyeok Bae, Hanyeoreum Jung, Myoungsoo |
| contents | This work introduces a GPU storage expansion solution utilizing CXL, featuring a novel GPU system design with multiple CXL root ports for integrating diverse storage media (DRAMs and/or SSDs). We developed and siliconized a custom CXL controller integrated at the hardware RTL level, achieving two-digit nanosecond roundtrip latency, the first in the field. This study also includes speculative read and deterministic store mechanisms to efficiently manage read and write operations to hide the endpoint's backend media latency variation. Performance evaluations reveal our approach significantly outperforms existing methods, marking a substantial advancement in GPU storage technology. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2506_15601 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | CXL-GPU: Pushing GPU Memory Boundaries with the Integration of CXL Technologies Gouk, Donghyun Kang, Seungkwan Lee, Seungjun Kim, Jiseon Nam, Kyungkuk Ryu, Eojin Lee, Sangwon Kim, Dongpyung Jang, Junhyeok Bae, Hanyeoreum Jung, Myoungsoo Hardware Architecture This work introduces a GPU storage expansion solution utilizing CXL, featuring a novel GPU system design with multiple CXL root ports for integrating diverse storage media (DRAMs and/or SSDs). We developed and siliconized a custom CXL controller integrated at the hardware RTL level, achieving two-digit nanosecond roundtrip latency, the first in the field. This study also includes speculative read and deterministic store mechanisms to efficiently manage read and write operations to hide the endpoint's backend media latency variation. Performance evaluations reveal our approach significantly outperforms existing methods, marking a substantial advancement in GPU storage technology. |
| title | CXL-GPU: Pushing GPU Memory Boundaries with the Integration of CXL Technologies |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2506.15601 |