A System Level Compiler for Massively-Parallel, Spatial, Dataflow Architectures
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arXiv
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| Main Authors: | , , , , |
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| Format: | Preprint |
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2025
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| _version_ | 1866916800310018048 |
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| author | Van Essendelft, Dirk Wingo, Patrick Jordan, Terry Smith, Ryan Saidi, Wissam |
| author_facet | Van Essendelft, Dirk Wingo, Patrick Jordan, Terry Smith, Ryan Saidi, Wissam |
| contents | We have developed a novel compiler called the Multiple-Architecture Compiler for Advanced Computing Hardware (MACH) designed specifically for massively-parallel, spatial, dataflow architectures like the Wafer Scale Engine. Additionally, MACH can execute code on traditional unified-memory devices. MACH addresses the complexities in compiling for spatial architectures through a conceptual Virtual Machine, a flexible domain-specific language, and a compiler that can lower high-level languages to machine-specific code in compliance with the Virtual Machine concept. While MACH is designed to be operable on several architectures and provide the flexibility for several standard and user-defined data mappings, we introduce the concept with dense tensor examples from NumPy and show lowering to the Wafer Scale Engine by targeting Cerebras' hardware specific languages. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2506_15875 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | A System Level Compiler for Massively-Parallel, Spatial, Dataflow Architectures Van Essendelft, Dirk Wingo, Patrick Jordan, Terry Smith, Ryan Saidi, Wissam Programming Languages Hardware Architecture Distributed, Parallel, and Cluster Computing Emerging Technologies D.3; D.1; I.6; J.2 We have developed a novel compiler called the Multiple-Architecture Compiler for Advanced Computing Hardware (MACH) designed specifically for massively-parallel, spatial, dataflow architectures like the Wafer Scale Engine. Additionally, MACH can execute code on traditional unified-memory devices. MACH addresses the complexities in compiling for spatial architectures through a conceptual Virtual Machine, a flexible domain-specific language, and a compiler that can lower high-level languages to machine-specific code in compliance with the Virtual Machine concept. While MACH is designed to be operable on several architectures and provide the flexibility for several standard and user-defined data mappings, we introduce the concept with dense tensor examples from NumPy and show lowering to the Wafer Scale Engine by targeting Cerebras' hardware specific languages. |
| title | A System Level Compiler for Massively-Parallel, Spatial, Dataflow Architectures |
| topic | Programming Languages Hardware Architecture Distributed, Parallel, and Cluster Computing Emerging Technologies D.3; D.1; I.6; J.2 |
| url | https://arxiv.org/abs/2506.15875 |