Bias Variation Compensation in Perimeter-Gated SPAD TRNGs

Fuente: arXiv
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Auteurs principaux: Sajal, Md Sakibur, Guthrie, Hunter, Dandin, Marc
Format: Preprint
Publié: 2025
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author Sajal, Md Sakibur
Guthrie, Hunter
Dandin, Marc
author_facet Sajal, Md Sakibur
Guthrie, Hunter
Dandin, Marc
contents Random number generators that utilize arrays of entropy source elements suffer from bias variation (BV). Despite the availability of efficient debiasing algorithms, optimized implementations of hardware friendly options depend on the bit bias in the raw bit streams and cannot accommodate a wide BV. In this work, we present a 64 x 64 array of perimeter gated single photon avalanche diodes (pgSPADs), fabricated in a 0.35 μm standard CMOS technology, as a source of entropy to generate random binary strings with a BV compensation technique. By applying proper gate voltages based on the devices' native dark count rates, we demonstrate less than 1% BV for a raw-bit generation rate of 2 kHz/pixel at room temperature. The raw bits were debiased using the classical iterative Von Neumann's algorithm and the debiased bits were found to pass all of the 16 tests from NIST's Statistical Test Suite.
format Preprint
id arxiv_https___arxiv_org_abs_2506_15888
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Bias Variation Compensation in Perimeter-Gated SPAD TRNGs
Sajal, Md Sakibur
Guthrie, Hunter
Dandin, Marc
Instrumentation and Detectors
Hardware Architecture
Cryptography and Security
Computer Vision and Pattern Recognition
Random number generators that utilize arrays of entropy source elements suffer from bias variation (BV). Despite the availability of efficient debiasing algorithms, optimized implementations of hardware friendly options depend on the bit bias in the raw bit streams and cannot accommodate a wide BV. In this work, we present a 64 x 64 array of perimeter gated single photon avalanche diodes (pgSPADs), fabricated in a 0.35 μm standard CMOS technology, as a source of entropy to generate random binary strings with a BV compensation technique. By applying proper gate voltages based on the devices' native dark count rates, we demonstrate less than 1% BV for a raw-bit generation rate of 2 kHz/pixel at room temperature. The raw bits were debiased using the classical iterative Von Neumann's algorithm and the debiased bits were found to pass all of the 16 tests from NIST's Statistical Test Suite.
title Bias Variation Compensation in Perimeter-Gated SPAD TRNGs
topic Instrumentation and Detectors
Hardware Architecture
Cryptography and Security
Computer Vision and Pattern Recognition
url https://arxiv.org/abs/2506.15888