Experimental realization of the bucket-brigade quantum random access memory
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arXiv
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| Main Authors: | , , , , , , , , , , , , , , , , , , , , , , |
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| Format: | Preprint |
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2025
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| _version_ | 1866916802537193472 |
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| author | Shen, Fanhao Ji, Yujie Xiang, Debin Wang, Yanzhe Wang, Ke Zhang, Chuanyu Zhang, Aosai Zou, Yiren Gao, Yu Cui, Zhengyi Liu, Gongyu Yang, Jianan Han, Yihang Deng, Jinfeng Wang, Anbang Zhang, Zhihong Li, Hekang Guo, Qiujiang Zhang, Pengfei Song, Chao Lu, Liqiang Wang, Zhen Yin, Jianwei |
| author_facet | Shen, Fanhao Ji, Yujie Xiang, Debin Wang, Yanzhe Wang, Ke Zhang, Chuanyu Zhang, Aosai Zou, Yiren Gao, Yu Cui, Zhengyi Liu, Gongyu Yang, Jianan Han, Yihang Deng, Jinfeng Wang, Anbang Zhang, Zhihong Li, Hekang Guo, Qiujiang Zhang, Pengfei Song, Chao Lu, Liqiang Wang, Zhen Yin, Jianwei |
| contents | Quantum random access memory (QRAM) enables efficient classical data access for quantum computers -- a prerequisite for many quantum algorithms to achieve quantum speedup. Despite various proposals, the experimental realization of QRAM remains largely unexplored. Here, we experimentally investigate the circuit-based bucket-brigade QRAM with a superconducting quantum processor. To facilitate the experimental implementation, we introduce a hardware-efficient gate decomposition scheme for quantum routers, which effectively reduces the depth of the QRAM circuit by more than 30% compared to the conventional controlled-SWAP-based implementation. We further propose an error mitigation method to boost the QRAM query fidelity. With these techniques, we are able to experimentally implement the QRAM architectures with two and three layers, achieving query fidelities up to 0.800 $\pm$ 0.026 and 0.604$\pm$0.005, respectively. Additionally, we study the error propagation mechanism and the scalability of our QRAM implementation, providing experimental evidence for the noise resilience nature of the bucket-brigade QRAM architecture. Our results highlight the potential of superconducting quantum processors for realizing a scalable QRAM architecture. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2506_16682 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Experimental realization of the bucket-brigade quantum random access memory Shen, Fanhao Ji, Yujie Xiang, Debin Wang, Yanzhe Wang, Ke Zhang, Chuanyu Zhang, Aosai Zou, Yiren Gao, Yu Cui, Zhengyi Liu, Gongyu Yang, Jianan Han, Yihang Deng, Jinfeng Wang, Anbang Zhang, Zhihong Li, Hekang Guo, Qiujiang Zhang, Pengfei Song, Chao Lu, Liqiang Wang, Zhen Yin, Jianwei Quantum Physics Quantum random access memory (QRAM) enables efficient classical data access for quantum computers -- a prerequisite for many quantum algorithms to achieve quantum speedup. Despite various proposals, the experimental realization of QRAM remains largely unexplored. Here, we experimentally investigate the circuit-based bucket-brigade QRAM with a superconducting quantum processor. To facilitate the experimental implementation, we introduce a hardware-efficient gate decomposition scheme for quantum routers, which effectively reduces the depth of the QRAM circuit by more than 30% compared to the conventional controlled-SWAP-based implementation. We further propose an error mitigation method to boost the QRAM query fidelity. With these techniques, we are able to experimentally implement the QRAM architectures with two and three layers, achieving query fidelities up to 0.800 $\pm$ 0.026 and 0.604$\pm$0.005, respectively. Additionally, we study the error propagation mechanism and the scalability of our QRAM implementation, providing experimental evidence for the noise resilience nature of the bucket-brigade QRAM architecture. Our results highlight the potential of superconducting quantum processors for realizing a scalable QRAM architecture. |
| title | Experimental realization of the bucket-brigade quantum random access memory |
| topic | Quantum Physics |
| url | https://arxiv.org/abs/2506.16682 |