Saved in:
| Main Author: | |
|---|---|
| Format: | Preprint |
| Published: |
2025
|
| Subjects: | |
| Online Access: | https://arxiv.org/abs/2506.18780 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| _version_ | 1866912445029679104 |
|---|---|
| author | Wang, Shuangbao Paul |
| author_facet | Wang, Shuangbao Paul |
| contents | High-confidence computing relies on trusted instructional set architecture, sealed kernels, and secure operating systems. Cloud computing depends on trusted systems for virtualization tasks. Branch predictions and pipelines are essential in improving performance of a CPU/GPU. But Spectre and Meltdown make modern processors vulnerable to be exploited. Disabling the prediction and pipeline is definitely not a good solution. On the other hand, current software patches can only address non-essential issues around Meltdown. This paper introduces a holistic approach in trusted computer architecture design and emulation. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2506_18780 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Design high-confidence computers using trusted instructional set architecture and emulators Wang, Shuangbao Paul Cryptography and Security Hardware Architecture High-confidence computing relies on trusted instructional set architecture, sealed kernels, and secure operating systems. Cloud computing depends on trusted systems for virtualization tasks. Branch predictions and pipelines are essential in improving performance of a CPU/GPU. But Spectre and Meltdown make modern processors vulnerable to be exploited. Disabling the prediction and pipeline is definitely not a good solution. On the other hand, current software patches can only address non-essential issues around Meltdown. This paper introduces a holistic approach in trusted computer architecture design and emulation. |
| title | Design high-confidence computers using trusted instructional set architecture and emulators |
| topic | Cryptography and Security Hardware Architecture |
| url | https://arxiv.org/abs/2506.18780 |