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Hardware acceleration for ultra-fast Neural Network training on FPGA for MRF map reconstruction

Fuente: arXiv

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Détails bibliographiques
Auteurs principaux:	Ricchi, Mattia, Alfonsi, Fabrizio, Marella, Camilla, Barbieri, Marco, Retico, Alessandra, Brizi, Leonardo, Gabrielli, Alessandro, Testa, Claudia
Format:	Preprint
Publié:	2025
Sujets:	Hardware Architecture Computer Vision and Pattern Recognition Instrumentation and Detectors
Accès en ligne:	Acceder al recurso
Tags:	Ajouter un tag Pas de tags, Soyez le premier à ajouter un tag!

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